Patents by Inventor Andreas Stich

Andreas Stich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9857033
    Abstract: The invention relates to a lighting apparatus, having a quadrangular lighting surface, wherein the quadrangular lighting surface has a first lateral edge a and an opposing lateral edge ag, wherein the quadrangular lighting surface has a second lateral edge b and an opposing lateral edge bg, wherein the quadrangular lighting surface is constructed modularly from at least a first lighting module and further lighting modules. The at least first lighting module is triangular, wherein the base surface of the first lighting module has a lateral edge b1 and a vertex E1 opposing this lateral edge b1, wherein a connecting path between the vertex E1 and an intersection point L1 of a normal line with the lateral edge b1 is a height h1 of the first lighting module, where 0<h1?a and b=b1.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: January 2, 2018
    Assignee: OSRAM GmbH
    Inventor: Andreas Stich
  • Publication number: 20150252959
    Abstract: The invention relates to a lighting apparatus, having a quadrangular lighting surface, wherein the quadrangular lighting surface has a first lateral edge a and an opposing lateral edge ag, wherein the quadrangular lighting surface has a second lateral edge b and an opposing lateral edge bg, wherein the quadrangular lighting surface is constructed modularly from at least a first lighting module and further lighting modules. The at least first lighting module is triangular, wherein the base surface of the first lighting module has a lateral edge b1 and a vertex E1 opposing this lateral edge b1, wherein a connecting path between the vertex E1 and an intersection point L1 of a normal line with the lateral edge b1 is a height h1 of the first lighting module, where 0<h1?a and b=b1.
    Type: Application
    Filed: September 2, 2013
    Publication date: September 10, 2015
    Inventor: Andreas Stich
  • Patent number: 8709906
    Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.
    Type: Grant
    Filed: January 2, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Andreas Stich, Guenther Schindler, Michael Schrenk
  • Patent number: 8482663
    Abstract: A light-emitting diode array is disclosed which has two light-emitting diodes which are connected in antiparallel with one another, and a power supply which is suitable for energizing the light-emitting diodes independently of one another in the forward direction. In addition, an optical recording apparatus and a method for the pulsed operation of a light-emitting diode are disclosed.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: July 9, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Nadir Farchtchian, Günter Kirchberger, Gerhard Kuhn, Monika Rose, Michael Sailer, Andreas Stich
  • Patent number: 8403553
    Abstract: The luminous area of a lighting apparatus 10, 110, 210 with a rectangular luminous area is made up in modular fashion from individual rectangular luminous modules 1. The basic set comprises a first luminous module 11 of a first size, a second luminous module 21 of a second size, a third luminous module 31, whose length corresponds to the length of the first luminous module 11 and whose width corresponds to the width of the second luminous module 21, and a fourth luminous module 41, whose length corresponds to the width of the first luminous module 11 and whose width corresponds to the length of the second luminous module 21. By combining the luminous modules it is possible to produce backlighting for a multiplicity of display sizes.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: March 26, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Jürgen Beil, Wolfgang Lex, Andreas Stich
  • Publication number: 20120100689
    Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.
    Type: Application
    Filed: January 2, 2012
    Publication date: April 26, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Manfred Engelhardt, Andreas Stich, Guenther Schindler, Michael Schrenk
  • Patent number: 8093637
    Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 10, 2012
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Andreas Stich, Guenther Schindler, Michael Schrenk
  • Patent number: 7807563
    Abstract: In a method for manufacturing a layer arrangement, a plurality of electrically conductive structures are embedded in a substrate. Material of the substrate is removed at least between adjacent electrically conductive structures. An interlayer is formed on at least one portion of sidewalls of each of the electrically conductive structures. A first layer is formed on the interlayer where an upper partial region of the interlayer remaining free of a covering with the first layer. An electrically insulating second layer is formed selectively on that partial region of the interlayer which is free of the first layer, in such a way that the electrically insulating second layer bridges adjacent electrically conductive structures such that air gaps are formed between adjacent electrically conductive structures.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: October 5, 2010
    Assignee: Infineon Technologies AG
    Inventors: Zvonimir Gabric, Werner Pamler, Guenther Schindler, Gernot Steinlesberger, Andreas Stich, Martin Traving, Eugen Unger
  • Publication number: 20080297644
    Abstract: A light-emitting diode array is disclosed which has two light-emitting diodes which are connected in antiparallel with one another, and a power supply which is suitable for energizing the light-emitting diodes independently of one another in the forward direction. In addition, an optical recording apparatus and a method for the pulsed operation of a light-emitting diode are disclosed.
    Type: Application
    Filed: June 13, 2005
    Publication date: December 4, 2008
    Inventors: Nadir Farchtchian, Gunter Kirchberger, Gerhard Kuhn, Monika Rose, Michael Sailer, Andreas Stich
  • Publication number: 20070246831
    Abstract: In a method for manufacturing a layer arrangement, a plurality of electrically conductive structures are embedded in a substrate. Material of the substrate is removed at least between adjacent electrically conductive structures. An interlayer is formed on at least one portion of sidewalls of each of the electrically conductive structures. A first layer is formed on the interlayer where an upper partial region of the interlayer remaining free of a covering with the first layer. An electrically insulating second layer is formed selectively on that partial region of the interlayer which is free of the first layer, in such a way that the electrically insulating second layer bridges adjacent electrically conductive structures such that air gaps are formed between adjacent electrically conductive structures.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 25, 2007
    Inventors: Zvonimir Gabric, Werner Pamler, Guenther Schindler, Gernot Steinlesberger, Andreas Stich, Martin Traving, Eugen Unger
  • Publication number: 20070218677
    Abstract: A method for forming self-aligned air-gaps as IMD wherein the interconnect lines are covered with self-aligned capping layer and wherein the process of forming the capping layer is a maskless process is provided.
    Type: Application
    Filed: March 15, 2006
    Publication date: September 20, 2007
    Inventors: Manfred Engelhardt, Andreas Stich, Eugen Unger
  • Publication number: 20070120263
    Abstract: A conductor track arrangement includes a substrate, at least two conductor tracks, a cavity and a resist layer that covers the conductor tracks and closes off the cavity. By forming carrier tracks with a width less than a width of the conductor tracks, air gaps can also be formed laterally underneath the conductor tracks for reducing the coupling capacitances and the signal delays in a self-aligning manner.
    Type: Application
    Filed: August 18, 2006
    Publication date: May 31, 2007
    Inventors: Zvonimir Gabric, Werner Pamler, Guenther Schindler, Andreas Stich
  • Publication number: 20070111431
    Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.
    Type: Application
    Filed: September 29, 2006
    Publication date: May 17, 2007
    Inventors: Manfred Engelhardt, Andreas Stich, Guenther Schindler, Michael Schrenk
  • Publication number: 20060245213
    Abstract: The luminous area of a lighting apparatus 10, 110, 210 with a rectangular luminous area is made up in modular fashion from individual rectangular luminous modules 1. The basic set comprises a first luminous module 11 of a first size, a second luminous module 21 of a second size, a third luminous module 31, whose length corresponds to the length of the first luminous module 11 and whose width corresponds to the width of the second luminous module 21, and a fourth luminous module 41, whose length corresponds to the width of the first luminous module 11 and whose width corresponds to the length of the second luminous module 21. By combining the luminous modules it is possible to produce backlighting for a multiplicity of display sizes.
    Type: Application
    Filed: March 31, 2004
    Publication date: November 2, 2006
    Inventors: Jurgen Beil, Wolfgang Lex, Andreas Stich