Patents by Inventor Andreas Warloe

Andreas Warloe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160154114
    Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Application
    Filed: June 5, 2013
    Publication date: June 2, 2016
    Inventors: Andreas WARLOE, Charles Norman, Charles Abraham
  • Publication number: 20150091754
    Abstract: A method of tracking a code phase includes configuring local correlators with a first de-spreading local function; de-spreading an incoming signal with the first de-spreading local function to generate a first correlation output; determining a range estimate based on the first de-spreading local function; reconfiguring the local correlators with a second de-spreading local function when a delay-locked loop has locked to a correct correlation peak of the first correlation output; de-spreading the incoming signal with the second de-spreading local function to generate a second correlation output; determining a range estimate based on the second de-spreading local function that has a higher resolution than the range estimate based on the first de-spreading local function; and determining if the delay-locked loop has lost a lock to the correct correlation peak of the second correlation output to determine that the local correlators need to be reconfigured with the first de-spreading local function.
    Type: Application
    Filed: October 18, 2013
    Publication date: April 2, 2015
    Applicant: Broadcom Corporation
    Inventors: Jaleh KOMAILI, Charles NORMAN, Andreas WARLOE
  • Patent number: 8611397
    Abstract: A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: December 17, 2013
    Assignee: Broadcom Corporation
    Inventors: Charles Norman, Andreas Warloe, Charles Abraham, Jared Welz
  • Patent number: 8599069
    Abstract: A global navigation satellite system (GNSS) receiver may be operable to quantize two-dimensional GNSS sample data with an in-phase (I) and quadrature (Q) pair to two-dimensional quantized data with a magnitude and angle pair using the polar quantization, for example, an unrestricted polar quantization. The GNSS receiver may be operable to reduce a size of the two-dimensional quantized data for storage by representing the two-dimensional quantized data by the one-dimensional symbol data. The one-dimensional symbol data may be stored in a random access memory (RAM) for further processing. The I and Q pair associated with the one-dimensional symbol data stored in the RAM may be retrieved and processed by the GNSS receiver using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: December 3, 2013
    Assignee: Broadcom Corporation
    Inventors: Andreas Warloe, Charles Norman, Jason Goldberg, Charles Abraham, Jared Welz
  • Patent number: 8493268
    Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: July 23, 2013
    Assignee: Broadcom Corporation
    Inventors: Andreas Warloe, Charles Norman, Charles Abraham
  • Publication number: 20120306696
    Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Application
    Filed: February 13, 2012
    Publication date: December 6, 2012
    Applicant: Broadcom Corporation
    Inventors: Andreas Warloe, Charles Norman, Charles Abraham
  • Patent number: 8115675
    Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: February 14, 2012
    Assignee: Broadcom Corporation
    Inventors: Andreas Warloe, Charles Norman, Charles Abraham
  • Publication number: 20110193744
    Abstract: An integrated global navigation satellite system (GNSS) receiver may be operable to decompose GNSS IF signals associated with GPS satellites and/or GLONASS satellites into a constituent narrowband GPS data stream and/or a plurality of constituent narrowband GLONASS data streams utilizing, for example, a GPS IF tuner and/or one or more GLONASS IF tuners. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be processed at reduced sampling rates utilizing a shared sample memory in the integrated GNSS receiver. The narrowband GLONASS data streams and/or the narrowband GPS data stream may be stored in allocated sections of the shared sample memory. The stored narrowband GLONASS data streams and/or the stored narrowband GPS data stream may be processed using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Inventors: Andreas Warloe, Charles Norman, Charles Abraham
  • Publication number: 20110148702
    Abstract: A global navigation satellite system (GNSS) receiver may be operable to quantize two-dimensional GNSS sample data with an in-phase (I) and quadrature (Q) pair to two-dimensional quantized data with a magnitude and angle pair using the polar quantization, for example, an unrestricted polar quantization. The GNSS receiver may be operable to reduce a size of the two-dimensional quantized data for storage by representing the two-dimensional quantized data by the one-dimensional symbol data. The one-dimensional symbol data may be stored in a random access memory (RAM) for further processing. The I and Q pair associated with the one-dimensional symbol data stored in the RAM may be retrieved and processed by the GNSS receiver using a correlation such as a fast Fourier transform (FFT) correlation.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventors: Andreas Warloe, Charles Norman, Jason Goldberg, Charles Abraham, Jared Welz
  • Publication number: 20110150047
    Abstract: A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventors: Charles Norman, Andreas Warloe, Charles Abraham, Jared Welz
  • Patent number: 7889123
    Abstract: A GPS assembly test system and method for a wireless communications device, such as a mobile telephone, having an integrated GPS receiver. The GPS assembly test can be performed without the requirement of external testing equipment. The GPS assembly test activates the wireless communications device transmitter during testing to increase GPS in-band noise. If the GPS receiver components are installed and operating properly, a change in noise is expected and can be detected. Embodiments include test software to initiate the transmitter during testing. Different methods can be used to detect a change in noise density. For example, an expected automatic reduction in gain control to a low noise amplifier (LNA) can be detected when the transmitter is activated. Another example includes setting LNA gain to a fixed gain and detecting expected changes in data generated an analog-to-digital (A/D) converter in response to the increased noise.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: February 15, 2011
    Assignee: RF Micro Devices, Inc.
    Inventor: Andreas Warloe
  • Patent number: 7065629
    Abstract: The address translation logic of the present invention is incorporated in a global positioning system (GPS) receiver and operates to group data in memory based on translating the address from a direct memory access controller. The data includes post-correlated samples of the correlation of a signal with a generated frequency and a generated code having a plurality of time offsets. In general, the address translation logic organizes the data such that each element of the data associated with particular ones of the plurality of time offsets are grouped together in order to improve the efficiency of performing a fast Fourier transform of the data. In addition, the address translation logic allows the transfer of data from correlation circuitry to memory, from the memory to an FFT module, and from the FFT module to the memory using standard DMA controllers.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: June 20, 2006
    Assignee: RF Micro Devices, Inc.
    Inventors: Andreas Warloe, Michael J. Field
  • Patent number: 6825802
    Abstract: The jammer response circuitry of the present invention operates to control correlation circuitry in a GPS receiver based on an occurrence of a transmission from a wireless transmitter, thereby avoiding performance degradation in th GPS receiver due to interference caused by the transmission. In general, the jammer response circuitry activates a control signal during the transmission, thereby temporarily stopping the operation of the correlation circuitry. More particularly, the accumulation of results of a correlation of a received signal with a generated frequency and a generated code having numerous time offsets is temporarily stopped when the control signal is activated and resumes operation when the control signal is deactivated.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: November 30, 2004
    Inventor: Andreas Warloe
  • Patent number: 6806827
    Abstract: The correlation circuitry of the present invention operates in communication with a controller and transform circuitry to concurrently search a range of frequencies by correlating a received signal from the global positioning system (GPS) with a generated frequency and a generated code at a plurality of time offsets. The output of the correlation circuitry is provided to the transform circuitry, such as fast Fourier transform (FFT) circuitry, that transforms the output of the correlation circuitry. The results from the transformation circuitry are used by a GPS receiver to determine a frequency of the received GPS signal and a time offset associated with a ranging code carried in the received GPS signal.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: October 19, 2004
    Assignee: RF Micro Devices, Inc.
    Inventors: Andreas Warloe, Richard Keegan, Wayne Cox, Steve Francis Colborne, Richard Najarian
  • Patent number: 6778135
    Abstract: The global positioning system (GPS) receiver of the present invention operates to search a range of frequencies by correlating a baseband signal corresponding to a received GPS signal with a generated frequency and a generated code at a plurality of time offsets. Address translation logic operates to group results of the correlation according to the plurality of time offsets by translating addresses received from a direct memory access (DMA) controller in order to improve the efficiency of performing a fast Fourier transform (FFT) on the results of the correlation. The transformed data produced by the FFT process are used by the GPS receiver to determine a frequency of the received GPS signal and a time offset associated with a ranging code carried in the received GPS signal.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: August 17, 2004
    Assignee: RF Micro Devices, Inc.
    Inventors: Andreas Warloe, Richard Najarian, Benjamin Imai
  • Publication number: 20040095274
    Abstract: The global positioning system (GPS) receiver of the present invention operates to search a range of frequencies by correlating a baseband signal corresponding to a received GPS signal with a generated frequency and a generated code at a plurality of time offsets. Address translation logic operates to group results of the correlation according to the plurality of time offsets by translating addresses received from a direct memory access (DMA) controller in order to improve the efficiency of performing a fast Fourier transform (FFT) on the results of the correlation. The transformed data produced by the FFT process are used by the GPS receiver to determine a frequency of the received GPS signal and a time offset associated with a ranging code carried in the received GPS signal.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 20, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Andreas Warloe, Richard Najarian, Benjamin Imai
  • Publication number: 20040095272
    Abstract: The controller of the present invention is incorporated in a global positioning system (GPS) receiver and operates to control the power consumed by the receiver by controlling the clocking of numerous domains. Each domain includes circuitry associated with different functions of the receiver. For example, the receiver of the present invention includes domains for each channel, where the channels are used to locate and track GPS signals. When one or more of the channels are not in use, the controller deactivates the clock signal to the one or more unused channels, thereby minimizing the power consumed by the receiver.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 20, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Andreas Warloe, Wayne Cox
  • Publication number: 20040095275
    Abstract: The correlation circuitry of the present invention operates in communication with a controller and transform circuitry to concurrently search a range of frequencies by correlating a received signal from the global positioning system (GPS) with a generated frequency and a generated code at a plurality of time offsets. The output of the correlation circuitry is provided to the transform circuitry, such as fast Fourier transform (FFT) circuitry, that transforms the output of the correlation circuitry. The results from the transformation circuitry are used by a GPS receiver to determine a frequency of the received GPS signal and a time offset associated with a ranging code carried in the received GPS signal.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 20, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Andreas Warloe, Richard Keegan, Wayne Cox, Steve Colborne, Richard Najarian
  • Publication number: 20040098558
    Abstract: The address translation logic of the present invention is incorporated in a global positioning system (GPS) receiver and operates to group data in memory based on translating the address from a direct memory access controller. The data includes post-correlated samples of the correlation of a signal with a generated frequency and a generated code having a plurality of time offsets. In general, the address translation logic organizes the data such that each element of the data associated with particular ones of the plurality of time offsets are grouped together in order to improve the efficiency of performing a fast Fourier transform of the data. In addition, the address translation logic allows the transfer of data from correlation circuitry to memory, from the memory to an FFT module, and from the FFT module to the memory using standard DMA controllers.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 20, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Andreas Warloe, Michael J. Field
  • Publication number: 20040095273
    Abstract: The jammer response circuitry of the present invention operates to control correlation circuitry in a GPS receiver based on an occurrence of a transmission from a wireless transmitter, thereby avoiding performance degradation in the GPS receiver due to interference caused by the transmission. In general, the jammer response circuitry activates a control signal during the transmission, thereby temporarily stopping the operation of the correlation circuitry. More particularly, the accumulation of results of a correlation of a received signal with a generated frequency and a generated code having numerous time offsets is temporarily stopped when the control signal is activated and resumes operation when the control signal is deactivated.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 20, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventor: Andreas Warloe