Patents by Inventor Andrei Berar

Andrei Berar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6115645
    Abstract: A semiconductor tester at a first station includes a device handler operating under control of a first computer located at the first station. The handler is provided with a video camera having an output connected to a port of the first computer. A second computer, which includes a display monitor, is located at a second station, which is remote from the first station, and the first and second computers are connected in a computer network. The video camera is employed to acquire an image of the handler and the video camera provides the first computer with video data representative of this image. The video data is transmitted over the computer network to the second computer and is provided to the display monitor, whereby the image acquired by the video camera can be viewed on the display monitor. Information regarding operation of the device handler is transmitted from the second station to the first station.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: September 5, 2000
    Assignee: Credence Systems Corporation
    Inventor: Andrei Berar
  • Patent number: 6040700
    Abstract: In a semiconductor tester system including a wafer prober, the entire weight of the test head assembly is carried by the wafer prober frame. In one embodiment, a probe card is releasably attached to the test head assembly through a ring carrier and the probe tips are planarized during initial installation. In another embodiment, the probe card is attached directly to the test head assembly and the probe tips are planarized each time the probe card is changed.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: March 21, 2000
    Assignee: Credence Systems Corporation
    Inventor: Andrei Berar
  • Patent number: 6031387
    Abstract: A semiconductor integrated circuit test system, for testing semiconductor integrated circuit devices includes a test head containing pin electronics circuits and a device handler for receiving semiconductor integrated circuit devices to be tested and delivering the devices to a test station for engagement with the test head. The device handler includes a mechanical support structure, a test head manipulator having a first part rigidly attached to the mechanical support structure, a second part which is movable relative to the first part and to which the test head is attached, and a motor effective between the first and second parts of the manipulator for moving the second part relative to the first part. A power server is attached to the device handler independently of the test head manipulator. A cable connects the power server to the pin electronics circuits of the test head.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: February 29, 2000
    Assignee: Credence Systems Corporation
    Inventor: Andrei Berar