Patents by Inventor Andrei Dorofeev

Andrei Dorofeev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10448338
    Abstract: An example computer-implemented method includes determining, by an electronic device, that the electronic device has not received a user activity for an interval of time. The method also includes determining, by the electronic device, a contextual state of the electronic device, and adapting, by the electronic device, a sleep delay value based on the determined contextual state of the electronic device. The method also includes determining that the interval of time has exceeded the sleep delay value, and responsive to determining that the interval of time has exceeded the sleep delay value, transitioning, by the electronic device, from a first power state to a second power state, where the first power state is higher or lower than the second power state.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: October 15, 2019
    Assignee: Apple Inc.
    Inventors: Gaurav Kapoor, Andrei Dorofeev, Varaprasad V. Lingutla, Cyril de la Cropte de Chanterac
  • Patent number: 10417054
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 17, 2019
    Assignee: Apple Inc.
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20190034238
    Abstract: Systems and methods are disclosed for scheduling threads on an asymmetric multiprocessing system having multiple core types. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Metrics for workloads offloaded to co-processors can be tracked and integrated into metrics for the offloading thread group.
    Type: Application
    Filed: September 28, 2018
    Publication date: January 31, 2019
    Inventors: JOHN G. DORSEY, DANIEL A. CHIMENE, ANDREI DOROFEEV, BRYAN R. HINCH, EVAN M. HOKE, ADITYA VENKATARAMAN
  • Publication number: 20180349191
    Abstract: Systems and methods are disclosed for scheduling threads on an asymmetric multiprocessing system having multiple core types. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Metrics for workloads offloaded to co-processors can be tracked and integrated into metrics for the offloading thread group.
    Type: Application
    Filed: June 2, 2018
    Publication date: December 6, 2018
    Inventors: JOHN G. DORSEY, DANIEL A. CHIMENE, ANDREI DOROFEEV, BRYAN R. HINCH, EVAN M. HOKE, ADITYA VENKATARAMAN
  • Publication number: 20180349176
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180349175
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol, James S. Ismail
  • Publication number: 20180349186
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180349182
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180234923
    Abstract: An example computer-implemented method includes determining, by an electronic device, that the electronic device has not received a user activity for an interval of time. The method also includes determining, by the electronic device, a contextual state of the electronic device, and adapting, by the electronic device, a sleep delay value based on the determined contextual state of the electronic device. The method also includes determining that the interval of time has exceeded the sleep delay value, and responsive to determining that the interval of time has exceeded the sleep delay value, transitioning, by the electronic device, from a first power state to a second power state, where the first power state is higher or lower than the second power state.
    Type: Application
    Filed: April 4, 2018
    Publication date: August 16, 2018
    Applicant: Apple Inc.
    Inventors: Gaurav Kapoor, Andrei Dorofeev, Varaprasad V. Lingutla, Cyril de la Cropte de Chanterac
  • Patent number: 9942854
    Abstract: An example computer-implemented method includes determining, by an electronic device, that the electronic device has not received a user activity for an interval of time. The method also includes determining, by the electronic device, a contextual state of the electronic device, and adapting, by the electronic device, a sleep delay value based on the determined contextual state of the electronic device. The method also includes determining that the interval of time has exceeded the sleep delay value, and responsive to determining that the interval of time has exceeded the sleep delay value, transitioning, by the electronic device, from a first power state to a second power state, where the first power state is higher or lower than the second power state.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: April 10, 2018
    Assignee: Apple Inc.
    Inventors: Gaurav Kapoor, Andrei Dorofeev, Varaprasad V. Lingutla, Cyril de la Cropte de Chanterac
  • Publication number: 20160360488
    Abstract: An example computer-implemented method includes determining, by an electronic device, that the electronic device has not received a user activity for an interval of time. The method also includes determining, by the electronic device, a contextual state of the electronic device, and adapting, by the electronic device, a sleep delay value based on the determined contextual state of the electronic device. The method also includes determining that the interval of time has exceeded the sleep delay value, and responsive to determining that the interval of time has exceeded the sleep delay value, transitioning, by the electronic device, from a first power state to a second power state, where the first power state is higher or lower than the second power state.
    Type: Application
    Filed: September 4, 2015
    Publication date: December 8, 2016
    Applicant: APPLE INC.
    Inventors: Gaurav Kapoor, Andrei Dorofeev, Varaprasad V. Lingutla, Cyril de la Cropte de Chanterac
  • Publication number: 20130160003
    Abstract: Systems and methods described herein manage a computing device. A method includes receiving a threshold for an operating condition of a first computing device. An expected resource utilization of a computer program is determined. In addition, the method determines whether the computer program may be executed within the first computing device based on the operating condition threshold and the expected resource utilization of the computer program.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 20, 2013
    Applicant: VMWARE, INC.
    Inventors: Timothy P. MANN, Andrei DOROFEEV, Ganesha SHANMUGANATHAN, Anne Marie HOLLER
  • Patent number: 8296767
    Abstract: Management of contexts that execute on a computer system is described. More specifically, context scheduling in a virtual machine environment is described. Times at which a context transitions from a scheduled state to a descheduled state and times at which the context transitions from a descheduled state to a scheduled state are recorded for each context. Skew is detected using the recorded times. The amount of skew can be quantified, and a corrective action is triggered if the amount of skew fails to satisfy a threshold value.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: October 23, 2012
    Assignee: VMware, Inc.
    Inventors: Carl Waldspurger, John Zedlewski, Andrei Dorofeev
  • Patent number: 8176493
    Abstract: Management of contexts that execute on a computer system is described. More specifically, context scheduling in a virtual machine environment is described. A set of coscheduled contexts is monitored. If a skew metric associated with a first context of the coscheduled contexts fails to satisfy a condition, then a subset of the coscheduled contexts is descheduled although the first context remains scheduled.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: May 8, 2012
    Assignee: VMware, Inc.
    Inventors: Carl Waldspurger, John Zedlewski, Andrei Dorofeev
  • Patent number: 8171488
    Abstract: Management of contexts that execute on a computer system is described. More specifically, context scheduling in a virtual machine environment is described. A set of coscheduled contexts, including at least a first context and a second context, are monitored. The first and second contexts are alternately scheduled and descheduled so that both the first context and the second context are not concurrently scheduled.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: May 1, 2012
    Assignee: VMware, Inc.
    Inventors: Carl Waldspurger, John Zedlewski, Andrei Dorofeev
  • Patent number: 8127301
    Abstract: Management of contexts that execute on a computer system is described. More specifically, context scheduling in a virtual machine environment is described. A set of coscheduled contexts is monitored. If a skew metric associated with any one of the coscheduled contexts fails to satisfy a condition, then all coscheduled contexts in the set of coscheduled contexts not already descheduled are descheduled. After the contexts are descheduled, a subset of the set of coscheduled contexts is scheduled before the remainder of the set of coscheduled contexts.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: February 28, 2012
    Assignee: VMware, Inc.
    Inventors: Carl Waldspurger, John Zedlewski, Andrei Dorofeev
  • Patent number: 7614056
    Abstract: An abstraction layer is comprised in the operating system that represents the particulars of the PPMs. The abstractions in the abstraction layer are differentiated from one another by parameters representing the characteristics of the PPMs. The dispatcher uses the abstraction to balance processing loads when assigning execution threads to the PPMs. The assigning of the execution threads and the balancing of the processing loads is performed while taking account of the characteristics of the PPMs, such as shared resources and clock speed.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: November 3, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Eric C. Saxe, Andrei Dorofeev, Jonathan Chew, Bart Smaalders, Andrew G. Tucker