Patents by Inventor Andrei E. Vityaev

Andrei E. Vityaev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8335971
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel without intersymbol interference. Each of the one or more codewords incorporates or encodes one or more parity bits. The codewords are processed by a Non-ISI Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Non-ISI Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Non-ISI Meta-Viterbi detector receives an output generated from a symbol detector and processes the received output using a trellis having 2t states. In a representative embodiment, the Non-ISI Meta-Viterbi detector performs ?+2t2t add, compare, and select operations.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: December 18, 2012
    Assignee: Broadcom Corporation
    Inventor: Andrei E. Vityaev
  • Patent number: 8069397
    Abstract: A scheme in which a first decoder provides first decoding of a signal read from a disk. A second decoder, coupled to an output of the first decoder, combines with the first decoder to provide iterative decoding to recover data stored on the disk when in an iterative mode of operation. However, when in a non-iterative mode of operation, the output of the first decoder is coupled to an error correction code module to apply error correction code (ECC) to the output of the first decoder to recover data stored on the disk by non-iterative decoding.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: November 29, 2011
    Assignee: Broadcom Corporation
    Inventors: Andrei E. Vityaev, Thomas V. Souvignier, Gregory L. Silvus
  • Patent number: 8046666
    Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: October 25, 2011
    Assignee: LSI Corporation
    Inventors: Jongseung Park, Andrei E. Vityaev, Li Du
  • Patent number: 7974035
    Abstract: Timing recovery optimization using disk clock. A novel means is presented to perform and provide control of the sampling frequency of a signal that is read from a disk within a hard disk drive (HDD). Two separate, yet somewhat cooperating control loops are employed to provide feedback control of the sampling frequency of the signal that is read from disk. A timing recovery loop and a disk clock loop operate in conjunction with one another according to some desired manner (which can be predetermined or adaptive) to ensure that the sampling of the signal is performed to a very accurate degree. In one implementation, the timing recovery loop governs the sampling rate until the disk clock loop has locked, from which time either the disk clock loop govern the sampling or some combination of the signals provided from the two loops govern the sampling.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: July 5, 2011
    Assignee: Broadcom Corporation
    Inventors: William Gene Bliss, Thomas V. Souvignier, Andrei E. Vityaev, Gregory L. Silvus
  • Patent number: 7865801
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel without intersymbol interference. Each of the one or more codewords incorporates or encodes one or more parity bits. The codewords are processed by a Non-ISI Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Non-ISI Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Non-ISI Meta-Viterbi detector receives an output generated from a symbol detector and processes the received output using a trellis having 2t states. In a representative embodiment, the overall implementation complexity of the Non-ISI Meta-Viterbi detector is bounded by no more than ?+(?)2t2t operations, wherein t represents the number of parity bits used in a codeword and ? represents codeword length in bits.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: January 4, 2011
    Assignee: Broadcom Corporation
    Inventor: Andrei E. Vityaev
  • Patent number: 7836385
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel characterized by intersymbol interference. Each of the one or more codewords incorporates one or encodes one or more parity bits. The codewords are processed by a Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Meta-Viterbi detector receives an output generated from a Viterbi detector having 2s states and processes the received output using a trellis diagram having 2t states.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: November 16, 2010
    Assignee: Broadcom Corporation
    Inventor: Andrei E. Vityaev
  • Patent number: 7787202
    Abstract: A technique to perform a guided partial response target search for characterizing a read channel of a disk drive. A target adaptation scheme pre-selects a plurality of targets from a pool of potential targets based on certain criteria and the selected targets are sorted in linear gradient orders. When target adaptation is being performed by comparing the equalizer output with an ideal reconstructed signal, a difference value sets a gradient vector that is used to determine which direction to move along the sorted list of targets to select the next target.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: August 31, 2010
    Assignee: Broadcom Corporation
    Inventors: Xiaotong Lin, Andrei E. Vityaev
  • Patent number: 7602567
    Abstract: A method of feed-forward DC restoration in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating a feed-forward signal by performing a first detection on an input signal, wherein a DC component of the input signal was previously filtered out in the perpendicular magnetic read channel, (B) generating a restored signal by summing the input signal and the feed-forward signal, the summing restoring the DC component previously filtered out and (C) generating an output signal by performing a second detection on the restored signal, wherein the first detection is independent of the second detection.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: October 13, 2009
    Assignee: LSI Corporation
    Inventors: Jongseung Park, Andrei E. Vityaev, Alan D. Poeppelman
  • Publication number: 20090228769
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel characterized by intersymbol interference. Each of the one or more codewords incorporates one or encodes one or more parity bits. The codewords are processed by a Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Meta-Viterbi detector receives an output generated from a Viterbi detector having 2s states and processes the received output using a trellis diagram having 2t states.
    Type: Application
    Filed: February 5, 2009
    Publication date: September 10, 2009
    Inventor: Andrei E. Vityaev
  • Publication number: 20090172500
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel without intersymbol interference. Each of the one or more codewords incorporates or encodes one or more parity bits. The codewords are processed by a Non-ISI Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Non-ISI Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Non-ISI Meta-Viterbi detector receives an output generated from a symbol detector and processes the received output using a trellis having 2t states. In a representative embodiment, the Non-ISI Meta-Viterbi detector performs ?+2t2t add, compare, and select operations.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Inventor: Andrei E. Vityaev
  • Publication number: 20090044084
    Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Inventors: Jongseung Park, Andrei E. Vityaev, Li Du
  • Patent number: 7490284
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel characterized by intersymbol interference. Each of the one or more codewords incorporates one or encodes one or more parity bits. The codewords are processed by a Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Meta-Viterbi detector receives an output generated from a Viterbi detector having 2s states and processes the received output using a trellis diagram having 2t states.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: February 10, 2009
    Assignee: Broadcom Corporation
    Inventor: Andrei E. Vityaev
  • Publication number: 20090002862
    Abstract: A method of feed-forward DC restoration in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating a feed-forward signal by performing a first detection on an input signal, wherein a DC component of the input signal was previously filtered out in the perpendicular magnetic read channel, (B) generating a restored signal by summing the input signal and the feed-forward signal, the summing restoring the DC component previously filtered out and (C) generating an output signal by performing a second detection on the restored signal, wherein the first detection is independent of the second detection.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Jongseung Park, Andrei E. Vityaev, Alan D. Poeppelman
  • Patent number: 7469373
    Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel without intersymbol interference. Each of the one or more codewords incorporates or encodes one or more parity bits. The codewords are processed by a Non-ISI Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Non-ISI Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Non-ISI Meta-Viterbi detector receives an output generated from a symbol detector and processes the received output using a trellis having 2t states. In a representative embodiment, the Non-ISI Meta-Viterbi detector performs ?+2t2t add, compare, and select operations.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: December 23, 2008
    Assignee: Broadcom Corporation
    Inventor: Andrei E. Vityaev
  • Publication number: 20080022189
    Abstract: A scheme in which a first decoder provides first decoding of a signal read from a disk. A second decoder, coupled to an output of the first decoder, combines with the first decoder to provide iterative decoding to recover data stored on the disk when in an iterative mode of operation. However, when in a non-iterative mode of operation, the output of the first decoder is coupled to an error correction code module to apply error correction code (ECC) to the output of the first decoder to recover data stored on the disk by non-iterative decoding.
    Type: Application
    Filed: December 21, 2006
    Publication date: January 24, 2008
    Applicant: Broadcom Corporation, a California Corporation
    Inventors: Andrei E. Vityaev, Thomas V. Souvignier, Gregory L. Silvus
  • Publication number: 20080007854
    Abstract: A technique to perform a guided partial response target search for characterizing a read channel of a disk drive. A target adaptation scheme pre-selects a plurality of targets from a pool of potential targets based on certain criteria and the selected targets are sorted in linear gradient orders. When target adaptation is being performed by comparing the equalizer output with an ideal reconstructed signal, a difference value sets a gradient vector that is used to determine which direction to move along the sorted list of targets to select the next target.
    Type: Application
    Filed: November 10, 2006
    Publication date: January 10, 2008
    Applicant: Broadcom Corporation, a California Corporation
    Inventors: Xiaotong Lin, Andrei E. Vityaev
  • Publication number: 20080007855
    Abstract: A technique to sample a signal from a disk by using frequency and phase offset adjustment in a phase locked loop (PLL) timing recovery loop to sample read data from the disk, prior to a disk clocked clocking acquires a lock. Subsequently, sampling a signal from a disk by using only phase offset adjustment in the PLL timing recovery loop to sample read data from the disk after the disk clocked clocking acquires the lock. The sampled data is then error corrected by applying an error correction code (ECC).
    Type: Application
    Filed: December 21, 2006
    Publication date: January 10, 2008
    Applicant: Broadcom Corporation, a California Corporation
    Inventors: Andrei E. Vityaev, Thomas V. Souvignier, Gregory L. Silvus
  • Publication number: 20080002270
    Abstract: Timing recovery optimization using disk clock. A novel means is presented to perform and provide control of the sampling frequency of a signal that is read from a disk within a hard disk drive (HDD). Two separate, yet somewhat cooperating control loops are employed to provide feedback control of the sampling frequency of the signal that is read from disk. A timing recovery loop and a disk clock loop operate in conjunction with one another according to some desired manner (which can be predetermined or adaptive) to ensure that the sampling of the signal is performed to a very accurate degree. In one implementation, the timing recovery loop governs the sampling rate until the disk clock loop has locked, from which time either the disk clock loop govern the sampling or some combination of the signals provided from the two loops govern the sampling.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 3, 2008
    Applicant: Broadcom Corporation, a California Corporation
    Inventors: William Gene Bliss, Thomas V. Souvignier, Andrei E. Vityaev, Gregory L. Silvus
  • Patent number: 6427220
    Abstract: Apparatus and method for correcting errors in data recovered from a magnetic medium includes detecting the data recovered from the read wave form, and performing an arithmetic operation such as division on the recovered data sequence to determine any non-zero remainder as an indication of an error event. The recovered data sequence is corrected in response to logical determination of a possible event error and position in the recovered data sequence from a collection of predetermined error and position for which the division of the corrected data sequence yields zero remainder.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: July 30, 2002
    Assignee: Marvell International, Ltd.
    Inventor: Andrei E. Vityaev