Abstract: Disclosed is a method of modeling submicron MOSFETs for the purpose of circuit simulation. This invention is capable of accurately predicting performance of a MOSFET with complex geometry closely approximating the actual geometry of a device manufactured as part of an integrated circuit. Actual device geometry is predicted using physical simulation to account for process-related pattern distortion. The method constructs a sub-circuit representation of a MOSFET that is equivalent to a regular MOSFET compact model when ideal device geometry is assumed, while providing substantially better accuracy when process-related geometry distortion is considered. Models created using the disclosed method are compatible with existing circuit simulators. The method may be readily implemented using SPICE or other circuit simulators in a design flow.

Abstract: A method for selecting a process for forming a device, includes generating a plurality of equations using a response surface methodology model. Each equation relates a respective device simulator input parameter to a respective combination of processing parameters that can be used to form the device or a respective combination of device characteristics. A model of a figure-of-merit circuit is formed that is representative of an integrated circuit into which the device is to be incorporated. One of the combinations of processing parameters or combinations of device characteristics is identified that results in a device satisfying a set of performance specifications for the figure-of-merit circuit, using the plurality of equations and the device simulator.

Abstract: A method for performing self-consistent minimization of IC design and process interactions is disclosed. This method is based on calculating the amount of design-process interaction based on the information derived from circuit sensitivity analysis and process characterization. Optical proximity correction is subsequently performed in such a way that a) ensures that desired circuit performance is achieved in a given manufacturing environment if at all possible and b) also limits the increase in mask complexity to a realistic minimum.

Abstract: A method for selecting a process for forming a device, includes generating a plurality of equations using a response surface methodology model. Each equation relates a respective device simulator input parameter to a respective combination of processing parameters that can be used to form the device or a respective combination of device characteristics. A model of a figure-of-merit circuit is formed that is representative of an integrated circuit into which the device is to be incorporated. One of the combinations of processing parameters or combinations of device characteristics is identified that results in a device satisfying a set of performance specifications for the figure-of-merit circuit, using the plurality of equations and the device simulator.