Abstract: A method and apparatus for self-testing of a radio frequency (RF) chipset is provided. The method requires that a set of test instructions be loaded into a software load station. Once the software is loaded, reference calibration is conducted with test equipment connected. After calibration, the test equipment is disconnected and self-testing of a transmit chain begins. A pre-determined load value is connected and the self-testing process routes a signal from the RF chipset internal modem through a power amplifier, duplexer, first coupler, switch, second coupler, and RF integrated circuit (IC). The apparatus includes a RF chipset that has an internal modem and signal generator as well as processors for processing self-testing of a transmit chain, self-testing of a primary receiver, and self-testing of a diversity receiver chain.

Abstract: A procedure for testing an electronic device is disclosed. A computer bundles into command groups multiple test and wait commands of a test sequence. Each command group is sent to the device, reducing the per-message latency of the command transfers. The commands are queued and stored in the device. The wait commands define the timeline of the tests to be executed on the device. For example, each wait command forces a wait state of a length corresponding to the parameter of the wait command. The length of the wait state is measured from the beginning of the test sequence or the completion of the previous wait command. The wait state associated with each wait command may be made longer than the combined conservative estimates of time periods required for executing all the test commands between a previous point in time defined in the test sequence and the current wait command.