Patents by Inventor Andrei Vityaev

Andrei Vityaev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110305082
    Abstract: Methods and apparatus are provided for soft data generation for memory devices. At least one soft data value is generated for a memory device, by obtaining at least one hard read value; and generating the soft data value associated with the at least one hard read value based on statistics for reading the hard read value. The hard read value may be one or more of data bits, voltage levels, current levels and resistance levels. The generated soft data value may be one or more of (i) a soft read value that is used to generate one or more log likelihood ratios, and (ii) one or more log likelihood ratios. The statistics comprise one or more of bit-based statistics and cell-based statistics. The statistics may also optionally comprise pattern-dependent disturbance of at least one aggressor cell on the target cell, as well as location-specific statistics.
    Type: Application
    Filed: September 30, 2009
    Publication date: December 15, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20110246842
    Abstract: Methods and apparatus are provided for approximating a probability density function or distribution for a received value in communication or storage systems. A target distribution is approximated for a received value in one or more of a communication system and a memory device, by substantially minimizing a squared error between the target distribution of the received values and a second distribution obtained by mapping a predefined distribution, such as a Gaussian distribution, through a mapping function, wherein the second distribution has an associated set of parameters. The mapping function can be, for example, a piecewise linear function. The second distribution has a plurality of segments and each of the segments has an associated set of parameters. The associated set of parameters can be used to compute probability values, soft data values or log likelihood ratios.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Erich F. Haratsch, Nenad Miladinovic, Andrei Vityaev
  • Publication number: 20110246136
    Abstract: Methods and apparatus are provided for computing a probability value of a received value in communication or storage systems. A probability value for a received value in a communication system or a memory device is computed by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the probability value using the set of parameters associated with the identified segment.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Erich F. Haratsch, Nenad Miladinovic, Andrei Vityaev
  • Publication number: 20110246859
    Abstract: Methods and apparatus are provided for computing soft data or log likelihood ratios for received values in communication or storage systems. Soft data values or log likelihood ratios are computed for received values in a communication system or a memory device by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the soft data value or log likelihood ratio using the set of parameters associated with the identified segment. The computed soft data values or log likelihood ratios are optionally provided to a decoder.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Erich F. Haratsch, Nenad Miladinovic, Andrei Vityaev
  • Publication number: 20110239089
    Abstract: Methods and apparatus for soft data generation for memory devices using decoder performance feedback. At least one soft data value is generated in a memory device, by obtaining performance feedback from a decoder; obtaining an error statistic based on the performance feedback; and generating the at least one soft data value based on the obtained error statistic. The performance feedback comprises one or more of decoded bits, a number of erroneous bits based on data decoded by the decoder and a number of unsatisfied parity checks.
    Type: Application
    Filed: September 30, 2009
    Publication date: September 29, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20110225350
    Abstract: Methods and apparatus are provided for soft data generation for memory devices using reference cells. At least one soft data value is generated in a memory device by writing a known data to one or more reference cells; reading one or more of the reference cells; obtaining a read statistic based on the read one or more reference cells; and obtaining the at least one soft data value based on the obtained read statistic. The read statistics can optionally be obtained for one or more desired locations of a memory array; or for a given pattern, PATT, in one or more aggressor cells. The read statistic can optionally comprise asymmetric statistics obtained for a plurality of possible values.
    Type: Application
    Filed: September 30, 2009
    Publication date: September 15, 2011
    Inventors: Harley F. Burger, JR., Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Johnson Yen
  • Publication number: 20110216586
    Abstract: Methods and apparatus are provided for intercell interference mitigation using modulation coding. During programming of a flash memory, a modulation encoding is performed that selects one or more levels for programming the flash memory such that a reduced number of cells in the flash memory are programmed with a value that violates one or more predefined criteria. During a reading of a flash memory, a modulation decoding is performed that assigns one or more levels to cells in the flash memory such that a reduced number of cells in the flash memory are read with a value that violates one or more predefined criteria. The predefined criteria can be based, for example, on one or more of an amount of disturbance caused by the programmed cell; a voltage shift of a programmed cell: a voltage stored by a programmed cell; an amount of change in current through a programmed cell; and an amount of current through a programmed cell.
    Type: Application
    Filed: June 30, 2009
    Publication date: September 8, 2011
    Inventors: Nils Graef, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Johnson Yen
  • Publication number: 20110149657
    Abstract: Methods and apparatus are provided for write-side intercell interference mitigation in flash memories. A flash memory device is written by obtaining program data to be written to at least one target cell in the flash memory; obtaining one or more bits of program data for at least one aggressor cell to be programmed later than the target cell: and precompensating for intercell interference for the target cell by generating precompensated program values. The aggressor cells comprise one or more cells adjacent to the target cell, such as adjacent cells in a same wordline as the target cell and/or cells in an upper or lower adjacent wordline to the target cell. The precompensated program values for the target cell are optionally provided to the flash memory.
    Type: Application
    Filed: June 30, 2009
    Publication date: June 23, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Johnson Yen
  • Publication number: 20110141808
    Abstract: Methods and apparatus are provided for programming multiple program values per signal level in flash memories. A flash memory device having a plurality of program values is programmed by programming the flash memory device for a given signal level, wherein the programming step comprises a programming phase and a plurality of verify phases. In another variation, a flash memory device having a plurality of program values is programmed, and the programming step comprises a programming phase and a plurality of verify phases, wherein at least one signal level comprises a plurality of the program values. The signal levels or the program values (or both) can be represented using one or more of a voltage, a current and a resistance.
    Type: Application
    Filed: July 21, 2009
    Publication date: June 16, 2011
    Applicant: LSI CORPORATION
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Johnson Yen
  • Publication number: 20110141815
    Abstract: Methods and apparatus are provided for read-side intercell interference mitigation in flash memories, A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.
    Type: Application
    Filed: June 30, 2009
    Publication date: June 16, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Johnson Yen
  • Publication number: 20110145487
    Abstract: Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern of values stored in at least a portion of the flash memory, wherein the probability density functions comprises pattern-dependent disturbance of one or more aggressor cells on the at least one target cell in the flash memory; evaluating at least one selected probability density function based on the measured read value, r; and computing one or more log likelihood ratios based on a result of the evaluating step.
    Type: Application
    Filed: June 30, 2009
    Publication date: June 16, 2011
    Applicant: LSI CORPORATION
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Johnson Yen
  • Publication number: 20110090734
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Application
    Filed: March 11, 2009
    Publication date: April 21, 2011
    Inventors: Harley F. Burger, JR., Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 7822138
    Abstract: A calculator for use in a maximum likelihood detector, including: a receiver for receiving convolution encoded data which may include noise; first calculator for calculating a first component of a first path metric difference between two possible sequences of states corresponding to the convolution encoded data, the two sequences each having a length equal to a constraint length of the convolution encoded data, and the two sequences starting at a same state and ending at a same state, adapted to calculate the first component using the convolution-encoded data and using convolution encoding parameters of the convolution-encoded data, wherein the first component is independent of the two sequences; and second calculator for calculating a second component of the first path metric difference using the two sequences, wherein the second component is independent of the convolution encoded data; and using the first and second components to obtain the first path metric difference.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: October 26, 2010
    Assignee: Forte Design Systems Limited
    Inventors: Oleg Zaboronski, Nicholas Atkinson, Robert Charles Jackson, Theo Drane, Andrei Vityaev
  • Publication number: 20080320369
    Abstract: One or more methods and systems of effectively retrieving data stored in a media of a storage device are presented. The one or more methods and systems are implemented by way of correcting and detecting errors using a multi-stage decoding process. In one embodiment, the storage device comprises a magnetic hard drive. In one embodiment, the system and method applies an encoding/decoding technique that allows error correction and detection to be performed over a number of successive decode stages or processing stages. Use of the system and method increases the maximum number of symbol errors that may be corrected in an encoded codeword, providing an improvement in data recovery.
    Type: Application
    Filed: August 28, 2008
    Publication date: December 25, 2008
    Inventor: Andrei Vityaev
  • Publication number: 20080278837
    Abstract: One or more methods and systems are presented for performing gain and timing acquisition of data read from one or more data sectors of a hard disk drive. The gain and timing information may be used to synchronize a read channel receiver of the hard disk drive to the data read from the data sector(s). In a representative embodiment, the one or more methods comprises determining one or more frequency and phase offsets using one or more preambles of one or more data sectors residing in a hard disk drive. In a representative embodiment, the gain of the one or more preambles may be determined. In another representative embodiment, the one or more systems used to determine one or more phase and frequency offsets, and amplitudes, comprise hardware and/or software capable of utilizing a sequence of consecutive samples provided by one or more preambles of one or more data sectors.
    Type: Application
    Filed: July 23, 2008
    Publication date: November 13, 2008
    Inventors: Chengzhi Pan, Andrei Vityaev
  • Patent number: 7426676
    Abstract: One or more methods and systems of effectively retrieving data stored in a media of a storage device are presented. The one or more methods and systems are implemented by way of correcting and detecting errors using a multi-stage decoding process. In one embodiment, the storage device comprises a magnetic hard drive. In one embodiment, the system and method applies an encoding/decoding technique that allows error correction and detection to be performed over a number of successive decode stages or processing stages. Use of the system and method increases the maximum number of symbol errors that may be corrected in an encoded codeword, providing an improvement in data recovery.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: September 16, 2008
    Assignee: Broadcom Corporation
    Inventor: Andrei Vityaev
  • Patent number: 7405894
    Abstract: One or more methods and systems are presented for performing gain and timing acquisition of data read from one or more data sectors of a hard disk drive. The gain and timing information may be used to synchronize a read channel receiver of the hard disk drive to the data read from the data sector(s). In a representative embodiment, the one or more methods comprises determining one or more frequency and phase offsets using one or more preambles of one or more data sectors residing in a hard disk drive. In a representative embodiment, the gain of the one or more preambles may be determined. In another representative embodiment, the one or more systems used to determine one or more phase and frequency offsets, and amplitudes, comprise hardware and/or software capable of utilizing a sequence of consecutive samples provided by one or more preambles of one or more data sectors.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: July 29, 2008
    Assignee: Broadcom Corporation
    Inventors: Chengzhi Pan, Andrei Vityaev
  • Patent number: 7274312
    Abstract: An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b1, b2, b. . . bk to a coded sequence c0, c1, c2 . . . cq. The selection circuit selects c0 in the coded sequence c0, c1, c2 . . . cq such that the output of the precoder circuit has less than a maximum number q of transitions. The conversion circuit may include an encoder circuit to convert user data b1, b2, b3 . . . bk to a sequence c1, c2 . . . cq, and a transition minimization circuit to add c0 to the sequence c1, c2 . . . cq. The apparatus may have a circuit to add at least one additional bit, which may be a parity bit, to the coded sequence c0, c1, c2 . . . cq.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: September 25, 2007
    Assignee: Infineon Technologies AG
    Inventors: William G. Bliss, Andrei Vityaev, Razmik Karabed
  • Patent number: 7263652
    Abstract: A maximum likelihood detector receiving a data stream corresponding to ideal values which may include noise, and outputting information specifying a sequence of states of maximum likelihood selected from possible states corresponding to the data stream according to weighting value selections made by the processors, the ideal values being determined by the possible states, including: a pre-processor to obtain first weighting values; processors in a hierarchy, each processor in a select level of the hierarchy is programmed to use, respectively, a plurality of the weighting values to calculate subsequent weighting values indicating respective likelihoods that a section of the data stream values corresponds to each of a plurality of possible state sequences, for each possible initial state and each possible final state, to select further weighting value of highest likelihood corresponding to a state sequence from the initial state to the final state.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: August 28, 2007
    Assignee: Arithmatica Limited
    Inventors: Oleg Zaboronski, Andrei Vityaev
  • Patent number: 7260167
    Abstract: A method is for decoding a bit stream from a waveform representing the bit stream, having a first synchronization mark, data, and a second synchronization mark. Digitized samples are decoded to form a reconstructed bit stream. The reconstructed bit stream is then stored. At least one of the first synchronization mark and the second synchronization mark are then extracted from the reconstructed bit stream. Finally, the data are extracted from the reconstructed bit stream using an iterative decoding process, in accordance with at least one of the first synchronization mark and the second synchronization mark. As such, loss of the data between the first synchronization mark and the second synchronization mark, if there is a problem with the first synchronization mark, is avoided.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: August 21, 2007
    Assignee: Marvell International Ltd.
    Inventors: Pantas Sutardja, Andrei Vityaev