Abstract: FZ silicon which shows no degradation of its minority carrier lifetime after any processing steps at a processing temperature of less than 900° C. is prepared by annealing FZ silicon at an annealing temperature of greater than or equal to 900° C. and processing the annealed FZ silicon at a processing temperature of less than 900° C.

Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.

Abstract: The invention relates to a method for producing semiconductor substrates by bonding. The aim of said method is to reduce the non-usable edge region on the bonded wafer component and to improve the edge geometry of the wafer composite. This is achieved by a method for joining two semiconductor wafers using a semiconductor wafer bonding process. The surfaces of the two semiconductor wafers that are to be bonded are provided with a border or edge geometry that has a special short front-end facet. After the bonding process, one of the two wafers is ablated to obtain an edge region that is as devoid as possible of defects and a usable wafer surface that is as large as possible.

Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.

Abstract: The invention relates to a method for producing semiconductor substrates by bonding. The aim of said method is to reduce the non-usable edge region on the bonded wafer component and to improve the edge geometry of the wafer composite. This is achieved by a method for joining two semiconductor wafers using a semiconductor wafer bonding process. The surfaces of the two semiconductor wafers that are to be bonded are provided with a border or edge geometry that has a special short front-end facet. After the bonding process, one of the two wafers is ablated to obtain an edge region that is as devoid as possible of defects and a usable wafer surface that is as large as possible.

Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.