Patents by Inventor Andrej TKALCEC

Andrej TKALCEC has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multichip reference logging synchronization
    Patent number: 10747259
    Abstract: Herein is disclosed a multichip reference logging system comprising a control circuit, configured to generate a reference signal; a first chip, configured to generate a first operations log, the first chip further comprising a first reference circuit, configured to receive the reference signal and to create a first reference event in response to the received reference signal; a memory associated with the first chip, configured to store the first reference event within the first operations log; a second chip, configured to generate a second operations log, the second chip further comprising a second reference circuit, configured to receive the reference signal and to create a second reference event in response to the received reference signal; and a memory associated with the second chip, configured to store the second reference event within the second operations log.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: August 18, 2020
    Assignee: Intel IP Corporation
    Inventors: Uwe Schumacher, Peter Lachner, Andrej Tkalcec, Donald Korinke
  • Multichip Reference Logging Synchronization
    Publication number: 20190050021
    Abstract: Herein is disclosed a multichip reference logging system comprising a control circuit, configured to generate a reference signal; a first chip, configured to generate a first operations log, the first chip further comprising a first reference circuit, configured to receive the reference signal and to create a first reference event in response to the received reference signal; a memory associated with the first chip, configured to store the first reference event within the first operations log; a second chip, configured to generate a second operations log, the second chip further comprising a second reference circuit, configured to receive the reference signal and to create a second reference event in response to the received reference signal; and a memory associated with the second chip, configured to store the second reference event within the second operations log.
    Type: Application
    Filed: December 29, 2017
    Publication date: February 14, 2019
    Inventors: Uwe SCHUMACHER, Peter LACHNER, Andrej TKALCEC, Donald KORINKE