Abstract: Systems, methods, and techniques utilize reinforcement learning to efficiently schedule a sequence of jobs for execution by one or more processing threads. A first sequence of execution jobs associated with rendering a target frame of a sequence of frames is received. One or more reward metrics related to rendering the target frame are selected. A modified sequence of execution jobs for rendering the target frame is generated, such as by reordering the first sequence of execution jobs. The modified sequence is evaluated with respect to the selected reward metric(s); and rendering the target frame is initiated based at least in part on the evaluating of the modified sequence with respect to the one or more selected reward metric(s).

Abstract: Systems, methods, and techniques utilize reinforcement learning to efficiently schedule a sequence of jobs for execution by one or more processing threads. A first sequence of execution jobs associated with rendering a target frame of a sequence of frames is received. One or more reward metrics related to rendering the target frame are selected. A modified sequence of execution jobs for rendering the target frame is generated, such as by reordering the first sequence of execution jobs. The modified sequence is evaluated with respect to the selected reward metric(s); and rendering the target frame is initiated based at least in part on the evaluating of the modified sequence with respect to the one or more selected reward metric(s).

Abstract: The present application discloses a method for communicating between at least two different levels of software components. The method includes establishing a command set common to the at least two different levels of software components. Additionally, the method includes providing a command decoder operable by both of the at least two levels of software components, the command decoder configured to decode the command set. By providing a common command set between different levels of software components, such as a software driver and a BIOS, where the commands within the command table are interpreted and executed by an identical command decoder that interprets and executes the same command tables, this ensures that the same features or functions are implemented or executed in the same way across different levels of the software components. Accordingly, redundant implementation of the same functions by different software components is eliminated.

Abstract: A computer system has a processor and a queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of different clock frequencies. In one embodiment, the clocking frequency is determined by estimating a short or long term load associated with the stored instructions. In another embodiment, the clocking frequency is determined by analyzing a set of the stored instructions.

Abstract: A method and apparatus for automated testing of display signals from video graphics circuitry includes capturing display signals that are provided from a processing device to the display device. The method and apparatus further includes converting the display signals into data acquisition signals, where a data acquisition signal includes a converted display signal having the display information contained therein wherein the data acquisition signal is in a form capable of being directly analyzed by a testing system. Furthermore, the method and apparatus includes providing the data acquisition signals to a test system that tests the display signals.

Abstract: A computer system has a processor and a queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of different clock frequencies. In one embodiment, the clocking frequency is determined by estimating a short or long term load associated with the stored instructions. In another embodiment, the clocking frequency is determined by analyzing a set of the stored instructions.

Abstract: A computer system has at least one processor and at least one queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of rates. A number of instructions in the queue is measured. The optimum clock rate is selected based on in part the determined number of queued instructions.

Abstract: The present application discloses a method for communicating between at least two different levels of software components. The method includes establishing a command set common to the at least two different levels of software components. Additionally, the method includes providing a command decoder operable by both of the at least two levels of software components, the command decoder configured to decode the command set. By providing a common command set between different levels of software components, such as a software driver and a BIOS, where the commands within the command table are interpreted and executed by an identical command decoder that interprets and executes the same command tables, this ensures that the same features or functions are implemented or executed in the same way across different levels of the software components. Accordingly, redundant implementation of the same functions by different software components is eliminated.

Abstract: A method and apparatus for automated testing of display signals from video graphics circuitry includes capturing display signals that are provided from a processing device to the display device. The method and apparatus further includes converting the display signals into data acquisition signals, where a data acquisition signal includes a converted display signal having the display information contained therein wherein the data acquisition signal is in a form capable of being directly analyzed by a testing system. Furthermore, the method and apparatus includes providing the data acquisition signals to a test system that tests the display signals.

Abstract: A computer system has at least one processor and at least one queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of rates. A number of instructions in the queue is measured. The optimum clock rate is selected based on in part the determined number of queued instructions.

Abstract: A computer system has at least one processor and at least one queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of rates. A number of instructions in the queue is measured. The optimum clock rate is selected based on in part the determined number of queued instructions.

Abstract: A computer system has at least one processor and at least one queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of rates. A number of instructions in the queue is measured.