Abstract: Methods, systems, and computer program products are described for automatically reducing interference within received signals. A first radio frequency (RF) signal having (i) a desired component and (ii) an interference component with a noise component and a jammed component is received. A trained machine learning (ML) model extracts, from the RF signal, the jammed component and a portion of the noise component. The trained ML model generates and outputs a second RF signal comprising the desired component and a reduced noise component. The reduced noise component has the portion of the noise component removed. The jammed component is removed from the second RF signal.

Abstract: Methods, systems, and computer program products are described for automatically reducing interference within received signals. A first radio frequency (RF) signal having (i) a desired component and (ii) an interference component with a noise component and a jammed component is received. A trained machine learning (ML) model extracts, from the RF signal, the jammed component and a portion of the noise component. The trained ML model generates and outputs a second RF signal comprising the desired component and a reduced noise component. The reduced noise component has the portion of the noise component removed. The jammed component is removed from the second RF signal.

Abstract: RFID systems for locating RFID tags utilizing phased array antennas and compressed sensing processing techniques in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, an RFID system includes at least one exciter that includes at least one transmit antenna, a phased antenna array that includes a plurality of receive antennas, and an RFID receiver system configured to communicate with the at least one exciter and connected to the phased antenna array, where the RFID receiver system is configured to locate an RFID tag by performing reads of the RFD tag at multiple frequencies, generating a measurement matrix, and determining a line of sight (LOS) distance between the activated RFID tag and each of the plurality of receive antennas by eliminating bases from the measurement matrix.

Abstract: RFID systems for locating RFID tags utilizing phased array antennas and compressed sensing processing techniques in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, an RFID system includes at least one exciter that includes at least one transmit antenna, a phased antenna array that includes a plurality of receive antennas, and an RFID receiver system configured to communicate with the at least one exciter and connected to the phased antenna array, where the RFID receiver system is configured to locate an RFID tag by performing reads of the RFD tag at multiple frequencies, generating a measurement matrix, and determining a line of sight (LOS) distance between the activated RFID tag and each of the plurality of receive antennas by eliminating bases from the measurement matrix.

Abstract: RFID systems for locating RFID tags utilizing phased array antennas and compressed sensing processing techniques in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, an RFID system includes at least one exciter that includes at least one transmit antenna, a phased antenna array that includes a plurality of receive antennas, and an RFID receiver system configured to communicate with the at least one exciter and connected to the phased antenna array, where the RFID receiver system is configured to locate an RFID tag by performing reads of the RFD tag at multiple frequencies, generating a measurement matrix, and determining a line of sight (LOS) distance between the activated RFID tag and each of the plurality of receive antennas by eliminating bases from the measurement matrix.

Abstract: RFID systems for locating RFID tags utilizing phased array antennas and compressed sensing processing techniques in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, an RFID system includes at least one exciter that includes at least one transmit antenna, a phased antenna array that includes a plurality of receive antennas, and an RFID receiver system configured to communicate with the at least one exciter and connected to the phased antenna array, where the RFID receiver system is configured to locate an RFID tag by performing reads of the RFD tag at multiple frequencies, generating a measurement matrix, and determining a line of sight (LOS) distance between the activated RFID tag and each of the plurality of receive antennas by eliminating bases from the measurement matrix.

Abstract: Low density parity check (LDPC) decoders are described utilizing a sequential schedule called Zigzag LBP (Z-LBP), for a layered belief propagation (LBP) architecture. Z-LBP has a lower computational complexity per iteration than variable-node-centric LBP (V-LBP), while being simpler than flooding and check-node-centric LBP (C-LBP). For QC-LDPC codes where the sub-matrices can have at most one “1” per column and one “1” per row, Z-LBP can perform partially-parallel decoding with the same performance as C-LBP. The decoder comprises a control circuit and memory coupled to a parity check matrix. Message passage is performed within Z-LBP in a first direction on odd iterations, and in a second direction on even iterations. As a result, a smaller parity check matrix can be utilized, while convergence can be more readily attained. The inventive method and apparatus can also be implemented for partially-parallel architectures.

Abstract: Low density parity check (LDPC) decoders are described utilizing a sequential schedule called Zigzag LBP (Z-LBP), for a layered belief propagation (LBP) architecture. Z-LBP has a lower computational complexity per iteration than variable-node-centric LBP (V-LBP), while being simpler than flooding and check-node-centric LBP (C-LBP). For QC-LDPC codes where the sub-matrices can have at most one “1” per column and one “1” per row, Z-LBP can perform partially-parallel decoding with the same performance as C-LBP. The decoder comprises a control circuit and memory coupled to a parity check matrix. Message passage is performed within Z-LBP in a first direction on odd iterations, and in a second direction on even iterations. As a result, a smaller parity check matrix can be utilized, while convergence can be more readily attained. The inventive method and apparatus can also be implemented for partially-parallel architectures.

Abstract: Low density parity check (LDPC) codes (LDPCCs) have an identical code blocklength and different code rates. At least one of the rows of a higher-rate LDPC matrix is obtained by combining a plurality of rows of a lower-rate LDPC matrix with the identical code blocklength as the higher-rate LDPC matrix.