Patents by Inventor Andres Walker

Andres Walker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5028819
    Abstract: A CMOS N-channel, open-drain, pull-down buffer circuit is capable of pulling down voltages on an external pad in excess of the breakdown voltage of the individual N-channel field effect transistors in the buffer circuit. The circuit may be fabricated as part of a CMOS interated circuit in an industrial standard 1.5 microns CMOS process. The higher voltage acceptance is effected by using two open-drain N-transistors in series such that the external voltage is divided among the two transistors. A parallel high voltage circuit to the external pad can be independently optimized to provide a lower impedance path and a higher endurance for electrostatic discharge. While the two-transistor voltage divider exposes one of the transistor' gate to ESD via another external terminal, enhanced ESD protection is effected by having a resistor in series between the gate and the external terminal.
    Type: Grant
    Filed: June 8, 1990
    Date of Patent: July 2, 1991
    Assignee: Zilog, Inc.
    Inventors: Tom S. Wei, Elisabeth Ekman, Andre Walker, Stephen Clark
  • Patent number: 4921689
    Abstract: The present invention relates to an improved process for producing beta manganese dioxide and for producing cathodes from said manganese dioxide. The process comprises heating gamma manganese dioxide at at least 450.degree. C. for up to one hour in order to convert a majority of the gamma manganese dioxide to the beta phase without forming detrimental amounts of lower oxides.
    Type: Grant
    Filed: June 24, 1988
    Date of Patent: May 1, 1990
    Assignee: Duracell Inc.
    Inventors: Andre Walker, Terrence F. Reise