Patents by Inventor Andrew B Swaine

Andrew B Swaine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8707106
    Abstract: A trace unit is provided which is configured to generate items of trace data indicative of processing activities, of a data processing unit. The trace unit comprises a trace indexing unit configured to associate an index value with at least a subset of the items of trace data generated by the trace unit. The trace indexing unit is configured to generate each index value as one of a predetermined sequence of index values, wherein an n+1th index value in the predetermined sequence can be determined from only an nth index value in the predetermined sequence.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: April 22, 2014
    Assignee: ARM Limited
    Inventors: John M Horley, Andrew B Swaine, Paul A Gilkerson
  • Publication number: 20110314264
    Abstract: A trace unit is provided which is configured to generate items of trace data indicative of processing activities, of a data processing unit. The trace unit comprises a trace indexing unit configured to associate an index value with at least a subset of the items of trace data generated by the trace unit. The trace indexing unit is configured to generate each index value as one of a predetermined sequence of index values, wherein an n+1th index value in the predetermined sequence can be determined from only an nth index value in the predetermined sequence.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 22, 2011
    Applicant: ARM Limited
    Inventors: John M. Horley, Andrew B. Swaine, Paul A. Gilkerson
  • Patent number: 7197671
    Abstract: A trace module traces changes in a subset of architectural state of a data processing apparatus. A trace generation unit receives input signals from components of the data processing apparatus indicative of a change in the subset of architectural state and generates a number of trace elements indicative of the change to enable a recipient of the trace elements to subsequently reconstruct the subset of architectural state. A table maintained by the trace generation unit identifies an architectural state derivable from previously generated trace elements. The trace generation unit references the table to determine which trace elements to generate. The table reduces the number of trace elements that need to be generated by providing a record of the architectural state which has already been provided to the recipient. Only those trace elements relating to changes in architectural state which are not derivable by the recipient need be generated.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: March 27, 2007
    Assignee: Arm Limited
    Inventors: Andrew B Swaine, David J Williamson
  • Patent number: 7093108
    Abstract: The present invention provides an apparatus and method for storing instruction set information. The apparatus comprises a processing circuit for executing processing instructions from any of a plurality of instruction sets of processing instructions, each processing instruction being specified by an instruction address identifying that processing instruction's location in memory. A different number of instruction address bits need to be specified in the instruction address for processing instructions in different instruction sets. The apparatus further comprises encoding logic for encoding an instruction address with an indication of the instruction set corresponding to that instruction to generate an n-bit encoded instruction address.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: August 15, 2006
    Assignee: ARM Limited
    Inventor: Andrew B. Swaine
  • Patent number: 7003699
    Abstract: The present invention provides a data processing apparatus and method for generating trace signals. The data processing apparatus comprises a component whose behaviour is to be traced, and a trace generation unit for receiving input signals from the component indicative of the behaviour, and for generating from the input signals high priority and low priority trace signals for outputting to a trace receiving device. The trace generation unit is responsive to assertion of a suppression signal from the trace receiving device to suppress generation of the low priority trace signals, with the aim of avoiding overflow of the trace receiving device.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: February 21, 2006
    Assignee: ARM Limited
    Inventors: Andrew B Swaine, David J Williamson
  • Publication number: 20040030962
    Abstract: The present invention relates to the generation of trace elements within a data processing apparatus having one or more components whose behaviour is to be traced. A trace module is disclosed which is operable to trace changes in a subset of architectural state of a data processing apparatus with which the trace module is coupled. The trace module comprises a trace generation unit operable to receive input signals from one or more components of the data processing apparatus indicative of a change in the subset of architectural state and to generate from one or more of the input signals a number of trace elements indicative of the change so as to enable a recipient of the trace elements to subsequently reconstruct the subset of architectural state.
    Type: Application
    Filed: June 3, 2003
    Publication date: February 12, 2004
    Applicant: ARM LIMITED
    Inventors: Andrew B. Swaine, David J. Williamson
  • Publication number: 20030229823
    Abstract: The present invention provides a data processing apparatus and method for generating trace signals. The data processing apparatus comprises a component whose behaviour is to be traced, and a trace generation unit for receiving input signals from the component indicative of the behaviour, and for generating from the input signals high priority and low priority trace signals for outputting to a trace receiving device. The trace generation unit is responsive to assertion of a suppression signal from the trace receiving device to suppress generation of the low priority trace signals, with the aim of avoiding overflow of the trace receiving device.
    Type: Application
    Filed: July 29, 2002
    Publication date: December 11, 2003
    Inventors: Andrew B. Swaine, David J. Williamson
  • Publication number: 20020161989
    Abstract: The present invention provides an apparatus and method for storing instruction set information. The apparatus comprises a processing circuit for executing processing instructions from any of a plurality of instruction sets of processing instructions, each processing instruction being specified by an instruction address identifying that processing instruction's location in memory. A different number of instruction address bits need to be specified in the instruction address for processing instructions in different instruction sets. The apparatus further comprises encoding logic for encoding an instruction address with an indication of the instruction set corresponding to that instruction to generate an n-bit encoded instruction address.
    Type: Application
    Filed: June 8, 2001
    Publication date: October 31, 2002
    Inventor: Andrew B. Swaine