Abstract: One embodiment disclosed relates to a method of preventative maintenance of a high-availability cluster. A least-recently-tested active node is determined. The least-recently-tested active node is swapped out from the HA cluster, and a stand-by node is swapped into the HA cluster. Other embodiments are also disclosed.

Abstract: A variable impedance test probe of the present invention comprises a first signal conductor, a first ground reference conductor, and a first dielectric element disposed between the first signal conductor and the first ground reference conductor. The dielectric element is configured to selectively vary an impedance of the first signal conductor relative to the ground reference conductor.

Abstract: An electronic system has independently coolable first and second zones. The electronic system includes a first zone having a first zone fan and a plurality of first zone connectors for connecting electronic modules and a second zone having a second fan zone and a plurality of second zone connectors for connecting electronic modules. A module manager is also provided for communicating with the first and second zone connectors and with the first and second zone fans. The module manager can independently control the speed of the first and second zone fans based upon operational parameters received from the first and second zone connectors.

Abstract: A rack equipment capacity control system and method is presented. In one embodiment of the present invention, a capacity demand plan rack equipment control method is utilized to control operation of rack equipment. A rack equipment capacity alteration request is received. An analysis of the rack equipment capacity alteration request is performed. Performance of the rack equipment is changed in accordance with the analysis of the rack equipment capacity alteration request.

Abstract: A rack equipment power pricing plan control system and method is presented. In one embodiment of the present invention, a power pricing plan rack equipment control method is utilized to control operation of rack equipment. A power pricing plan for operating the rack equipment is established. The rack equipment is operated in accordance with the power pricing plan.

Abstract: One embodiment disclosed relates to a node system of a high-availability cluster. The node system includes at least a first register and an output port. The first register stores multi-state status data of the node, and the output port sends signals representing this multi-state status data. The multi-state status data includes at least one degraded state. The node system may also include a second register and an input port. The input port receives signals representing the multi-state status data of another node. The second stores this multi-state status data from the other node. Another embodiment disclosed relates to a method of status reporting for a node of a cluster. A set of rules is applied to determine current multi-state status of the node. The states of the multi-state status including a good state, a bad state, and at least one degraded state.

Abstract: One embodiment disclosed relates to a method of status generation for a node of a high-availability cluster. A heartbeat signal is sent from the node through a network to the cluster. In addition, a current status of the node is determined, and the status is sent out through a specialized interface to a next node. Another embodiment disclosed relates to a method of cluster-wide management performed per node. A heartbeat input received from the previous node is checked. Furthermore, an up/down status input received from the previous node and a degraded status input received from the previous node are also checked. Another embodiment disclosed relates to a system for of a high-availability cluster. The system includes a general inter-node communication network that is configured to carry signals including heartbeat signals from the nodes. In addition, a separate inter-node communication channel is included for communicating node status signals.

Abstract: A connector provides capacitive coupling between circuit devices such as printed circuitboards and integrated circuits. The connector includes at least a first contact that contacts a conductor of the first circuit device, a second contact that contacts a conductor of the second circuit device, and a capacitor coupled between the first and second contacts. The connector includes an insulative body that encapsulate the capacitor and carries the first and second contacts. The connector may further include a plurality of the first contacts, a like plurality of the second contacts, and a like plurality of AC blocking capacitors with each capacitor being coupled between a respective different pair of the first contacts and second contacts.

Abstract: One embodiment disclosed relates to a method of communicating status from a node of a cluster of computer systems. A first status signal is received from a computational node, and a default status signal is generated. The first status signal and the default status signal are used to generate a second status signal. Another embodiment disclosed relates to a method of communicating node status within a cluster of computer systems. A first signal indicative of the status of a current node is generated. A second signal indicative of the status of a preceding node is received. The first signal is transmitted to a next node if the current node is present in the cluster, and the second signal is transmitted to the next node if the current node has been removed from the cluster.

Abstract: An equipment rack load modulation system and method are presented. An equipment rack aggregate thermal and power budget is determined. The aggregate thermal and power budget is allocated based upon rack equipment loaded in an equipment rack. The rack equipment is then operated in accordance with the allocation of the aggregate thermal and power budget.

Abstract: A rack equipment power purchase plan supervision system and method is presented. In one embodiment of the present invention, a rack equipment power purchase plan supervision system includes rack equipment for processing information. The rack equipment is supervised by a rack equipment power purchase plan supervision component in accordance with a power purchase plan. The power purchase plan defines operational settings of the rack equipment for various power supply conditions. A communication bus for communicating information communicatively couples the power purchase plan supervision component and the rack equipment.

Abstract: A computer system comprising an operating system, a first component that comprises a first test module, a second component that comprises a second test module, and an interconnect coupling the first component and the second component is provided. The first test module is configured to provide a first test pattern to the second test module on the interconnect in response to a first signal from the operating system.

Abstract: A computer system that includes a processor, a first bus coupled to the processor, a memory controller coupled to the first bus, a memory coupled to the memory controller, a first input/output (I/O) controller coupled to the first bus, and a test module coupled to the first I/O controller is provided. The test module is configured to cause tests to be performed on the memory using the first bus.

Abstract: A method and corresponding apparatus for detecting and rejecting high impedance failures in chip interconnects use monitoring circuitry on a chip to provide accurate and pro-active prediction of interconnect failures. The apparatus may include a resistance continuity monitoring circuit (RCMC), and a signal path connecting a representative set of pins to the RCMC. The RCMC measures the resistance of a connection of the representative set of pins with a circuit board during system operation and outputs a measured resistance data. The apparatus further includes additional analog-to-digital (A/D) hardware to perform an analog to digital conversion of the measured resistance data. Additional on-chip circuitry and/or microcode may be used to perform an algorithm on the digital resistance data to generate an interconnect status signal. For example, the method may output a failure signal when the measured resistance data exceeds a threshold resistance value.

Abstract: A computer system that includes a processor, a memory controller coupled to the processor, a memory coupled to the memory controller, a first input/output (I/O) controller coupled to the memory controller, a first expansion slot coupled to the first I/O controller, and a test module card coupled to the first expansion slot wherein the test module card is configured to cause tests to be performed on the memory using direct memory access (DMA) is provided.

Abstract: A computer system comprising a processor configured to cause an operating system to be booted, a test module, and a component coupled to the test module and configured to receive a clock input is provided. The test module is configured to cause the clock input to be provided to the component at a first frequency, and the test module is configured to cause a first test to be performed on the component subsequent to the clock input being provided to the component at the first frequency and the operating system being booted.

Abstract: One embodiment disclosed relates to a method of executing program code on a target microprocessor with multiple CPU cores thereon. One of the CPU cores is selected for testing, and inter-core context switching is performed. Parallel execution occurs of diagnostic code on the selected CPU core and the program code on remaining CPU cores. Another embodiment disclosed relates to a microprocessor having a plurality of CPU cores integrated on the microprocessor chip. Inter-core communications circuitry is coupled to each of the CPU cores and configured to perform context switching between the CPU cores.

Abstract: A computer system comprising a system module, a test module, a first cell, and a second cell is provided. The system module is configured to cause the test module to test the first cell subsequent to the second cell being allocated to a first instance of an operating system.

Abstract: A computer system comprising a first processor that is configured to cause an operating system to be booted, a test module, a component coupled to the test module, and a power supply coupled to the test module and the component is provided. The test module is configured to provide a first signal to the power supply to cause a first voltage to be provided to the component, and the test module is configured to cause a first test to be performed on the component subsequent to the first voltage being provided to the component and the operating system being booted.

Abstract: A device and method for defining a signal transmission path having a selectable, continuous impedance. In one embodiment of the invention, a circuit board is provided with a signal conductor, and a conductive plane having an opening, wherein dimensions of the opening and proximity of the opening to the signal conductor are selected to affect an impedance of the signal conductor. The signal conductor and the conductive plane form a transmission path with the impedance of the transmission path being a function in part of the opening and the signal conductor. Such a circuit board provides a signal-transmission path having a selectable, continuous impedance return-signal path.