Patents by Inventor Andrew Barth

Andrew Barth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9324168
    Abstract: Technologies are described herein for correcting the layout of shapes in a diagram, and specifically for diagrams having constraint-based layouts, such as with lists of regions and shapes directly connected without connecting lines. A request is received to correct the diagram layout. Shape layouts are predicted for each region, followed by minimal region corrections corresponding to the corrected shape layouts. Corrected layouts are provided sequentially through the lists of regions while resolving conflicts. Virtual nodes may be utilized to preserve region layouts when flipping or rotating diagrams. A connection classification and prioritization system is used to layout shapes and regions within a diagram having one or more direct connections between shapes and/or regions.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: April 26, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John Edward Haug, III, Jie Li, Ramona Pousti Canan, Zach Andrew Barth, Amit Velingkar
  • Patent number: 8181051
    Abstract: An electronic apparatus and a method of conserving energy comprises providing an energy-conservation module to control use of one or more energy-saving mechanism by a hardware element. The energy-conservation module comprises a performance estimation module that estimates a performance level requirement of the hardware element and a slack time. A cost-benefit qualifier module is provided that uses one or more generic algorithm and at least one separate record that characterizes power use and performance by the hardware element in relation to a Performance Power state of the selected energy-saving mechanism in order to determine an existence of an energy saving. The cost-benefit qualifier module sets the hardware element to use the Performance Power state of the selected energy-saving mechanism if the energy-saving exists.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: May 15, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Andrew Barth
  • Publication number: 20100153841
    Abstract: Technologies are described herein for correcting the layout of shapes in a diagram, and specifically for diagrams having constraint-based layouts, such as with lists of regions and shapes directly connected without connecting lines. A request is received to correct the diagram layout. Shape layouts are predicted for each region, followed by minimal region corrections corresponding to the corrected shape layouts. Corrected layouts are provided sequentially through the lists of regions while resolving conflicts. Virtual nodes may be utilized to preserve region layouts when flipping or rotating diagrams. A connection classification and prioritization system is used to layout shapes and regions within a diagram having one or more direct connections between shapes and/or regions.
    Type: Application
    Filed: February 25, 2010
    Publication date: June 17, 2010
    Applicant: Microsoft Corporation
    Inventors: John Edward Haug, III, Jie Li, Ramona Pousti Canan, Zach Andrew Barth, Amit Velingkar
  • Publication number: 20090031156
    Abstract: An electronic apparatus and a method of conserving energy comprises providing an energy-conservation module to control use of one or more energy-saving mechanism by a hardware element. The energy-conservation module comprises a performance estimation module that estimates a performance level requirement of the hardware element and a slack time. A cost-benefit qualifier module is provided that uses one or more generic algorithm and at least one separate record that characterises power use and performance by the hardware element in relation to a Performance Power state of the selected energy-saving mechanism in order to determine an existence of an energy saving. The cost-benefit qualifier module sets the hardware element to use the Performance Power state of the selected energy-saving mechanism if the energy-saving exists.
    Type: Application
    Filed: February 9, 2006
    Publication date: January 29, 2009
    Applicant: Freescale Semiconductor, Inc.
    Inventor: Andrew Barth