Patents by Inventor Andrew Bickler

Andrew Bickler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NAND programming technique
    Patent number: 8102712
    Abstract: A NAND memory array is programmed applying a programming voltage Vpgm as a double pulse programming pulse if a data pattern associated with memory cells that are to be programmed form a two-sided column-stripe (CS2) data pattern. The CS2 data pattern comprises a memory cell that is not to be programmed directly between two memory cells that are to be programmed, such that a channel associated with the memory cell that is not to be programmed has an applied boost voltage, and the channels associated with the two memory cells that are to be programmed have an applied programming voltage. The first memory cell of the two memory cells is programmed by the first programming voltage pulse and the second memory cell is programmed by the second programming voltage pulse. A programming voltage Vpgm is applied as a single pulse if a CS2 data pattern is not formed.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: January 24, 2012
    Assignee: Intel Corporation
    Inventors: Akira Goda, Andrew Bickler, Haitao Liu, Tomoharu Tanaka
  • NAND Programming Technique
    Publication number: 20110149654
    Abstract: A NAND memory array is programmed applying a programming voltage Vpgm as a double pulse programming pulse if a data pattern associated with memory cells that are to be programmed form a two-sided column-stripe (CS2) data pattern. The CS2 data pattern comprises a memory cell that is not to be programmed directly between two memory cells that are to be programmed, such that a channel associated with the memory cell that is not to be programmed has an applied boost voltage, and the channels associated with the two memory cells that are to be programmed have an applied programming voltage. The first memory cell of the two memory cells is programmed by the first programming voltage pulse and the second memory cell is programmed by the second programming voltage pulse. A programming voltage Vpgm is applied as a single pulse if a CS2 data pattern is not formed.
    Type: Application
    Filed: December 22, 2009
    Publication date: June 23, 2011
    Inventors: Akira Goda, Andrew Bickler, Haitao Liu, Tomoharu Tanaka