Patents by Inventor Andrew Boyce McNeill, Jr.
Andrew Boyce McNeill, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7584325Abstract: An apparatus, system, and method are disclosed for providing a redundant array of inexpensive disks (“RAID”) storage subsystem within a processor blade enclosure. A first RAID controller blade is included and configured to fit in a processor blade enclosure. At least one processor in communication with the first RAID controller blade is included. A disk enclosure blade is provided that includes a plurality of hard disk drives. The disk enclosure blade is configured to fit in the processor blade enclosure and the hard disk drives are in communication with the first RAID controller blade.Type: GrantFiled: July 26, 2006Date of Patent: September 1, 2009Assignee: International Business Machines CorporationInventors: William Gavin Holland, Shah Mohammed Rezaul Islam, Carl Evan Jones, Robert Akira Kubo, Gregg Steven Lucas, Andrew Boyce McNeill, Jr., Kenneth Robert Schneebeli, Theodore Brian Vojnovich
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Patent number: 6546499Abstract: Redundant Array of Inexpensive Platters (RAIP) uses data management and storage techniques and concepts from Redundant Array of Independent Disks (RAID) technology. These techniques and concepts that are used with multiple disks are incorporated into being used within a single disk drive. RAIP is used within a single disk drive having at least one platter and multiple heads. The at least one platter is utilized in the same or similar manner as at least one of the multiple disks in a redundant array of independent disks (RAID). RAIP is generally implemented by using each side of a platter of the single disk drive in the same or similar manner as each disk drive of multiple disk drives. A system and method of providing and implementing RAIP within a single disk drive is disclosed.Type: GrantFiled: October 14, 1999Date of Patent: April 8, 2003Assignee: International Business Machines CorporationInventors: David Carroll Challener, Andrew Boyce McNeill, Jr.
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Patent number: 6321277Abstract: A method and system for automatically providing termination to a SCSI I/O bus within a data processing system is disclosed. An inline terminator is provided for use within a data processing system. The inline terminator provides a connection between a first controller and an I/O bus utilizing a plurality of connection pins including a device removal detection pin. The inline terminator includes a terminator circuit and a control circuit coupled to the device removal detection pin to detect whether the controller and bus are connected. In one embodiment, the detection pin is a short ground pin on the SCSI bus that is not associated with a signal or differential signal pair. The terminator circuit is activated when the controller and bus are disconnected and deactivated otherwise to automatically terminate the I/O bus.Type: GrantFiled: November 16, 1998Date of Patent: November 20, 2001Assignee: International Business Machines CorporationInventors: Mark E. Andresen, Brian A. Carpenter, Andrew Boyce McNeill, Jr., Thomas Harold Newsom
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Patent number: 6282670Abstract: Means and method are disclosed for managing data while a RAID system is recovering from a media error. As a media error occurs, the failing storage device is identified and the areas of failure are recorded in non-volatile storage. A data recovery process is then continued so that a maximum amount of data can be recovered even though more than one error has occurred. Areas of failure are recorded in both non-volatile memory on the RAID adapter card and also in reserved areas of remaining storage devices. The storage areas that have been detected to contain media errors are stripe number, stripe unit number and also down to the sector number level of granularity. When the user tries to access data, these records are checked. If there is an entry in the table for a stripe being accessed, the user will receive an error message. Although the user may lose a small portion of the data, the user is only presented with an error message instead of incorrect data. The table can also be checked on write operations.Type: GrantFiled: June 22, 1998Date of Patent: August 28, 2001Assignee: International Business Machines CorporationInventors: Shah Mohammad Rezaul Islam, Dean Alan Kalman, Andrew Boyce McNeill, Jr., Philip Anthony Richardson
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Patent number: 6115764Abstract: A novel PHY concentrator design is disclosed. The PHY concentrator provides switchable dual paths to disk drives from dual controllers. The concentrator uses a common input that is shifted into an internal shift register during the bus reset state and uses an individual TpBias source for each TPA port connection, instead of a common one for all ports. An external shift register can be loaded with an odd/even pattern or a half-on/half-off pattern, which controls the individual TpBias source for each TPA port. The concentrator prevents closed loop conditions from occurring when a pair of concentrators are used to build an array of devices, such as a RAID structure.Type: GrantFiled: September 27, 1994Date of Patent: September 5, 2000Assignee: International Business Machines CorporationInventors: Douglas Roderick Chisholm, Andrew Boyce McNeill, Jr.
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Patent number: 5968143Abstract: An information handling system transfers command blocks between a host processing side having a host processing unit and a host memory and a local processing side having a local processing unit and a local memory. The command blocks are transferred from the host processing side to the local processing side by storing the host address of the command block in a local side register set. Upon storing the host address a transfer signal is given to a command block transfer controller to start a command block transfer without the local processor unit intervention.Type: GrantFiled: December 13, 1995Date of Patent: October 19, 1999Assignee: International Business Machines CorporationInventors: Douglas Roderick Chisholm, Gary Hoch, Timothy Vincent Lee, Andrew Boyce McNeill, Jr., Ed Wachtel
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Patent number: 5950230Abstract: Because correct configuration data is essential to the operation of any RAID system, and because multiple copies of the configuration data are kept, not only in the RAID controller itself, but also in each disk drive unit in the configuration, it is imperative that the various copies of the configuration data do not become "out of synchronization", which means that one or more copies of the configuration data are different from one or more other copies of the configuration data. To maintain synchronization of all copies of the configuration data, the current invention compares the configuration data stored in the RAID controller's NVRAM to that of the current system, and records any new, non-responding, repositioned or unidentified storage devices in a change list.Type: GrantFiled: July 2, 1997Date of Patent: September 7, 1999Assignee: International Business Machines CorporationInventors: Shah Mohammad Rezaul Islam, Andrew Boyce McNeill, Jr., Bharatkumar Jayantilal Oza
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Patent number: 5940866Abstract: An information handling system transfers command blocks between a host processing side having a host processing unit and a host memory, and a local processing side having a local processing unit and a local memory. The local memory includes a command address queue portion for queuing local command address images containing the local addresses of the command blocks. A command block transfer controller is responsive to the local command address images for storing the transferred command block into a corresponding portion of the local memory.Type: GrantFiled: December 13, 1995Date of Patent: August 17, 1999Assignee: International Business Machines CorporationInventors: Douglas Roderick Chisholm, Gary Hoch, Timothy Vincent Lee, Andrew Boyce McNeill, Jr., Ed Wachtel
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Patent number: 5802546Abstract: An information handling system transfers data blocks between a host processing side having a host processing unit and a host memory and a local processing side having a local processing unit and a local memory. The host memory includes a status queue memory portion having a plurality of status queue images each image storing a status information relating to a corresponding data transfer. The status information relating to data block transfers are posted on the host processing side. The host processing unit, upon system initialization, sets up a status queue register set within the local processing side defining status queue parameters including the location of the status queue memory portion within the host memory and pointer values pointing to where status queue images are to be stored and from where they are to be retrieved.Type: GrantFiled: December 13, 1995Date of Patent: September 1, 1998Assignee: International Business Machines Corp.Inventors: Douglas Roderick Chisholm, Gary Hoch, Timothy Vincent Lee, Andrew Boyce McNeill, Jr., Ed Wachtel
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Patent number: 5794069Abstract: An information handling system transfers data blocks between a host processing side having a CPU and a host memory and a local processing side having a local processing unit and a local memory. The local memory includes a DCB queue memory portion having a plurality of DCB images each image defining host and local addresses of a corresponding data transfer. The DCB images also store a default status condition representing the most likely condition of a data transfer which in the preferred embodiment is a no error condition. A data transfer status detector determines whether the default status condition is true or false. If true, the default status information relating to a corresponding data block transfer is posted on the host processing side without local processing unit intervention.Type: GrantFiled: December 13, 1995Date of Patent: August 11, 1998Assignee: International Business Machines Corp.Inventors: Douglas Roderick Chisholm, Gary Hoch, Timothy Vincent Lee, Andrew Boyce McNeill, Jr., Ed Wachtel
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Patent number: 5774641Abstract: In a data processing system, a redundant array of storage devices is provided for storing data from a host data processing system. When a selected, storage device receives a write command, the selected storage device reads old data from the logical address specified in the write command, and temporarily stores such old data in a buffer. Next, the selected storage device writes new data from the host data processing system to a location specified in the write command. Thereafter, an XOR operation is performed in the selected storage device between the new data and the old data to produce intermediate data. The intermediate data is then transferred to a second storage device within the array. Within the second storage device, old parity data is read from the media in the second storage device and placed in a buffer. Next, an XOR operation is performed in the second storage device between the intermediate data and the old parity data to produce new parity data.Type: GrantFiled: September 14, 1995Date of Patent: June 30, 1998Assignee: International Business Machines CorporationInventors: Shah Mohammad Rezaul Islam, Andrew Boyce McNeill, Jr., Bruce M. Cassidy
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Patent number: 5721880Abstract: A SCSI computer system is provided whereby a host computer gains access to a targeted but non-local peripheral device, which device or devices are individually responsive to either SCSI or non-SCSI commands, by sending SCSI commands via a SCSI bus to a connected SCSI target computer which emulates the targeted peripheral device local to the SCSI target computer, whether the targeted peripheral device is responsive to only SCSI or only non-SCSI commands, to cause the targeted peripheral device to carry out the initial SCSI commands.Type: GrantFiled: February 20, 1996Date of Patent: February 24, 1998Assignee: International Business Machines CorporationInventors: Andrew Boyce McNeill, Jr., Edward Irving Wachtel