Abstract: Embodiments of process kits for use in a process chamber are provided herein. In some embodiments, a process kit for use in a process chamber includes: a chamber liner having a tubular body with an upper portion and a lower portion; a confinement plate coupled to the lower portion of the chamber liner and extending radially inward from the chamber liner, wherein the confinement plate includes a plurality of slots; a shield ring disposed within the chamber liner and movable between the upper portion of the chamber liner and the lower portion of the chamber liner; and a plurality of ground straps coupled to the shield ring at a first end of each ground strap of the plurality of ground straps and to the confinement plate at a second end of each ground strap to maintain electrical connection between the shield ring and the chamber liner when the shield ring moves.

Abstract: A package substrate is provided, in which a second dielectric layer with a smaller CTE and a third dielectric layer with a larger CTE are formed on two opposite sides of a wiring structure including a first dielectric layer, respectively, so as to avoid too large a difference in CTE of the wiring structure between two sides thereof, thereby preventing warpage from occurring to the package substrate.

Abstract: A package substrate is provided, in which a first circuit structure and a second circuit structure with the same specification are formed on opposite sides of a core board body, respectively, and a wiring structure of another specification is formed on the first circuit structure. In addition, the number of wiring layers of the second circuit structure is greater than the number of wiring layers of the first circuit structure to form an asymmetric package substrate. Therefore, by configuration of the wiring structure, the problem of warpage caused by uneven stress can be prevented from occurring to the package substrate.

Abstract: An electronic package is provided, in which one of insulating layers inside a package substrate is made of an Ajinomoto build-up film (ABF) material to facilitate the production of circuit structures using a redistribution layer (RDL) process, so that a circuit layer can meet the needs of high-density fine lines/fine spacing.

Abstract: A package substrate is provided, in which a first circuit structure is formed on a core board body, and a second circuit structure is formed on the first circuit structure. A second insulating layer of the second circuit structure is made of an ABF material that is different from a material forming a first insulating layer of the first circuit structure, so that a second circuit layer with fine lines/spaces can be formed by the ABF material of the second insulating layer to achieve a purpose of multi-layer fine lines.

Abstract: An electronic package of which the manufacturing method is to dispose an electronic element on a circuit portion, encapsulate the electronic element with an Ajinomoto build-up film (ABF) used as an encapsulating layer, form a wiring layer on the encapsulating layer, and form a conductive via in the encapsulating layer. Therefore, the wiring layer can be well bonded onto the encapsulating layer as the ABF material is used as the encapsulating layer.

Abstract: A package substrate is provided and includes a core board body and a first circuit structure and a second circuit structure disposed on opposite sides of the core board body, where the number of wiring layers of the second circuit structure is different from the number of wiring layers of the first circuit structure, so that the package substrate is asymmetrical. The first circuit structure and the second circuit structure are designed according to the thickness and coefficient of thermal expansion of the first dielectric layer of the first circuit structure and the second dielectric layer of the second circuit structure, so as to prevent the problem of warping from occurring to the package substrate.

Abstract: A manufacturing method of a package substrate is provided, the manufacturing method includes forming a first circuit layer on a first metal layer; forming a dielectric layer on the first metal layer and the first circuit layer; forming a second metal layer on the dielectric layer; forming a plurality of conductive blind vias in the dielectric layer and forming a second circuit layer on the second metal layer, where the plurality of conductive blind vias are electrically connected to the first circuit layer and the second circuit layer; and removing the first metal layer and a portion of the second metal layer simultaneously. Therefore, in the manufacturing method, the first metal layer and the second metal layer can be removed by one etching process, such that the time for manufacturing the package substrate can be greatly reduced to increase production quantity.

Abstract: A package substrate and the manufacturing method thereof are provided. The method includes encapsulating a circuit layer and a conductive pillar on the circuit layer with an insulating layer, and then forming a groove in the insulating layer corresponding to the conductive pillar, so as to form a routing layer in the groove, so there is no need for drilling to make blind vias. Therefore, the alignment problem of conventional circuits and conductive blind vias can be avoided.

Abstract: An electronic package is provided, including a package substrate in which a circuit layer and a surface treatment layer are embedded in an insulating portion, and the surface treatment layer is coupled to a top surface of the circuit layer, but is not formed on a side surface of the circuit layer. Therefore, the circuit layer can maintain the original predetermined line spacing so that it is beneficial to be designed with fine line spacing/line width.

Abstract: A substrate structure is provided, in which an insulator encapsulates a conductive pillar that is a single solid pillar body, and at least one wiring layer electrically connected to the conductive pillar is arranged on the insulator. Therefore, the conductive pillar is designed as a single solid pillar body to meet the requirements of thin lines, fine spacing and high-density contacts.

Abstract: Embodiments disclosed herein relate to reducing a power consumption of an electronic device while maintaining some functionality of the electronic device while the electronic device is in a low power mode. The device may be in the low power mode due to a battery level being below a threshold. If the battery level is below the threshold, the electronic device may enter the low power mode. However, before entering the low power mode, some functionality of an application processor may be transferred to a communication controller. Once the functionality is transferred, the application processor may be disabled to reduce power consumption while maintaining functionality of the application processor. The electronic device may also utilize various communication protocols to communicate with a peripheral device. Even though the electronic device may be in the low power mode, the communication controller may be used to cause the peripheral device to perform various actions.

Abstract: Embodiments disclosed herein relate to reducing a power consumption of an electronic device while maintaining some functionality of the electronic device while the electronic device is in a low power mode. The device may be in the low power mode due to a battery level being below a threshold. If the battery level is below the threshold, the electronic device may enter the low power mode. However, before entering the low power mode, some functionality of an application processor may be transferred to a communication controller. Once the functionality is transferred, the application processor may be disabled to reduce power consumption while maintaining functionality of the application processor. The electronic device may also utilize various communication protocols to communicate with a peripheral device. Even though the electronic device may be in the low power mode, the communication controller may be used to cause the peripheral device to perform various actions.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

Abstract: A wireless power system may include an accessory configured to transfer or relay wireless power to a portable electronic device. The portable electronic device may include wireless charging circuitry and sensors configured to detect compatible accessories currently coupled with the portable electronic device. The portable electronic device performs wireless charging or related functions in accordance with the coupled accessories.

Abstract: A wireless power system may include an accessory configured to transfer or relay wireless power to a portable electronic device. The portable electronic device may include wireless charging circuitry and sensors configured to detect compatible accessories currently coupled with the portable electronic device. The portable electronic device performs wireless charging or related functions in accordance with the coupled accessories.

Abstract: Systems, methods, and computer-readable media for managing near field communications during a low power express mode of an electronic device are provided that may make credentials of a near field communication (“NFC”) component appropriately secure and appropriately accessible while also limiting the power consumption of the NFC component and of other components of the electronic device.

Abstract: A wireless power system may include an accessory configured to transfer or relay wireless power to a portable electronic device. The portable electronic device may include wireless charging circuitry and sensors configured to detect compatible accessories currently coupled with the portable electronic device. The portable electronic device performs wireless charging or related functions in accordance with the coupled accessories.

Abstract: Systems, methods, and computer-readable media for managing near field communications during a low power express mode of an electronic device are provided that may make credentials of a near field communication (“NFC”) component appropriately secure and appropriately accessible while also limiting the power consumption of the NFC component and of other components of the electronic device.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.