Patents by Inventor Andrew Celaya
Andrew Celaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984388Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: GrantFiled: June 6, 2023Date of Patent: May 14, 2024Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen St. Germain, Jay A. Yoder, Dennis Lee Conner, Frank Robert Cervantes, Andrew Celaya
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Publication number: 20230317576Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: ApplicationFiled: June 6, 2023Publication date: October 5, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen ST. GERMAIN, Jay A. YODER, Dennis Lee CONNER, Frank Robert CERVANTES, Andrew CELAYA
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Patent number: 11710686Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: GrantFiled: December 1, 2021Date of Patent: July 25, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen St. Germain, Jay A. Yoder, Dennis Lee Conner, Frank Robert Cervantes, Andrew Celaya
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Publication number: 20220084920Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: ApplicationFiled: December 1, 2021Publication date: March 17, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen ST. GERMAIN, Jay A. YODER, Dennis Lee CONNER, Frank Robert CERVANTES, Andrew Celaya
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Patent number: 11217515Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: GrantFiled: August 29, 2019Date of Patent: January 4, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen St. Germain, Jay A. Yoder, Dennis Lee Conner, Frank Robert Cervantes, Andrew Celaya
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Patent number: 11107753Abstract: Implementations of semiconductor packages may include: a substrate having one or more traces on a first side and one or more traces on a second side of the substrate. The substrate may be rigid. The packages may include at least one die mechanically and electrically coupled to the first side of the substrate. The die may be a high voltage die. The package may include one or more traces along one or more edges of the substrate. The one or more traces along the one or more edges of the substrate provide electrical connectivity between the one or more traces on the first side of the substrate and the one or more traces on the second side of the substrate. The package may also include a molding compound encapsulating at least the first and the one or more edges of the ceramic substrate.Type: GrantFiled: November 28, 2018Date of Patent: August 31, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen St. Germain, Roger Arbuthnot, David Billings, Andrew Celaya
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Publication number: 20200168529Abstract: Implementations of semiconductor packages may include: a substrate having one or more traces on a first side and one or more traces on a second side of the substrate. The substrate may be rigid. The packages may include at least one die mechanically and electrically coupled to the first side of the substrate. The die may be a high voltage die. The package may include one or more traces along one or more edges of the substrate. The one or more traces along the one or more edges of the substrate provide electrical connectivity between the one or more traces on the first side of the substrate and the one or more traces on the second side of the substrate. The package may also include a molding compound encapsulating at least the first and the one or more edges of the ceramic substrate.Type: ApplicationFiled: November 28, 2018Publication date: May 28, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen ST. GERMAIN, Roger ARBUTHNOT, David BILLINGS, Andrew CELAYA
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Publication number: 20190385939Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.Type: ApplicationFiled: August 29, 2019Publication date: December 19, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Stephen ST. GERMAIN, Jay A. YODER, Dennis Lee CONNER, Frank Robert CERVANTES, Andrew Celaya