Patents by Inventor Andrew Conners

Andrew Conners has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for submicron gap filling on a semiconductor substrate
    Patent number: 6191026
    Abstract: A semiconductor manufacturing process with improved gap fill capabilities is provided by a three step process of FSG deposition/etchback/FSG deposition. A first layer of FSG is partially deposited over a metal layer. An argon sputter etchback step is then carried out to etch out excess deposition material. Finally, a second layer of FSG is deposited to complete the gap fill process.
    Type: Grant
    Filed: January 9, 1996
    Date of Patent: February 20, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Virendra V. S. Rana, Andrew Conners, Anand Gupta, Xin Guo, Soonil Hong
  • Method and apparatus for improving gap-fill capability using chemical and physical etchbacks
    Patent number: 6190233
    Abstract: A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchback steps are completed, a second dielectric layer is deposited over the first dielectric layer to fill in the gap.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: February 20, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Soonil Hong, Choon Kun Ryu, Michael P. Nault, Kaushal K. Singh, Anthony Lam, Virendra V. S. Rana, Andrew Conners
  • Method and apparatus for improving gap-fill capability using chemical and physical etchbacks
    Patent number: 5990000
    Abstract: A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchback steps are completed, a second dielectric layer is deposited over the first dielectric layer to fill in the gap.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: November 23, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Soonil Hong, Choon Kun Ryu, Michael P. Nault, Kaushal K. Singh, Anthony Lam, Virendra V. S. Rana, Andrew Conners