Patents by Inventor Andrew D. Bailey

Andrew D. Bailey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270901
    Abstract: A substrate processing system comprises an edge computing device including processor that executes instructions stored in a memory to process an image or video captured by camera(s) of at least one of a substrate and a component of the substrate processing system. The component is associated with a robot transporting the substrate between processing chambers of the substrate processing system or between the substrate processing system and a second substrate processing system. The cameras are located along a travel path of the substrate. The instructions configure the processor to transmit first data from the image to a remote server via a network and to receive second data from the remote server via the network in response to transmitting the first data to the remote server. The instructions configure the processor to operate the substrate processing system according to the second data in an automated or autonomous manner.
    Type: Application
    Filed: July 22, 2020
    Publication date: August 25, 2022
    Inventors: Hossein SADEGHI, Scott BALDWIN, Andrew D. BAILEY
  • Publication number: 20170084433
    Abstract: A substrate etching system includes an etching control module, a filtering module, and an endpoint module. The etching control module selectively begins plasma etching of a substrate within an etching chamber. The filtering module, during the plasma etching of the substrate: receives a signal including endpoint information; decomposes the signal using empirical mode decomposition (EMD); and generates a filtered signal based on results of the EMD. The endpoint module indicates when an endpoint of the plasma etching of the substrate has been reached based on the filtered signal. The etching control module ends the plasma etching of the substrate in response to the indication that the endpoint of the plasma etching of the substrate has been reached.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Inventors: LUC ALBAREDE, YASSINE KABOUZI, JORGE LUQUE, ANDREW D. BAILEY
  • Publication number: 20080311758
    Abstract: Apparatus and methods protect a central process exclusion region of a substrate during processing of an edge environ region of process performance. Removal of undesired materials is only from the edge environ region while the central device region is protected from damage. Field strengths are configured to protect the central region from charged particles from plasma in a process chamber and to foster removal of the undesired materials from only the edge environ region. A magnetic field is configured with a peak value adjacent to a border between the central and edge environ regions. A strong field gradient extends from the peak radially away from the border and away from the central region to repel the charged particles from the central region. The strength and location of the field are adjustable by axial relative movement of magnet sections, and flux plates are configured to redirect the field for desired protection.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 18, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Andrew D. Bailey, Yunsang Kim
  • Publication number: 20080190556
    Abstract: Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 14, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Gregory S. Sexton, Andrew D. Bailey, Alan M. Schoepp, John D. Boniface
  • Publication number: 20080185105
    Abstract: Positional relationships are established in a process chamber. An upper electrode is configured with a first surface to support a wafer, and an electrode has a second surface. A linear drive is mounted on the base and a linkage connected between the drive and the upper electrode. Linkage adjustment defines a desired orientation between the surfaces. The linear drive and linkage maintain the desired orientation while the assembly moves the upper electrode with the surfaces moving relative to each other. An annular etching region defined between the electrodes enables etching of a wafer edge exclusion region extending along a top and bottom of the wafer. Removable etch defining rings are configured to define unique lengths along each of the top and bottom of the wafer to be etched. Positional relationships of the surfaces enable limiting the etching to those unique lengths of the exclusion region.
    Type: Application
    Filed: February 2, 2007
    Publication date: August 7, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Andrew D. Bailey, Jack Chen, Yunsang Kim, Gregory S. Sexton
  • Publication number: 20080179297
    Abstract: A device for cleaning a bevel edge of a semiconductor substrate. The device includes a lower electrode assembly that has a top surface and is adapted to support the substrate and an upper electrode assembly that has a bottom surface opposing the top surface. The lower and upper electrode assemblies generate plasma for cleaning the bevel edge of the substrate disposed between the top and bottom surfaces during operation. The device also includes a mechanism for suspending the upper electrode assembly over the lower support and adjusting the tilt angle and horizontal translation of the bottom surface relative to the top surface.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 31, 2008
    Applicant: Lam Research Corporation
    Inventors: Andrew D. Bailey, Alan M. Schoepp, Gregory Sexton, Andras Kuthi, Yunsang Kim, William S. Kennedy
  • Publication number: 20080081383
    Abstract: A method for calculating a process center for a chuck in a processing chamber is provided. The method includes generating pre-processing and post-processing measurement data points, which is perform by measuring thickness of a film substrate at a set of orientations and a set of distances from a geometric center of the substrate. The method also includes comparing the pre-processing and post-processing measurement data points to calculate a set of etch depth numbers. The method further includes generating etch profiles for the set of orientations. The method yet also includes extrapolating a set of radiuses, which is associated with a first etch depth, from the etch profiles. The method yet further includes generating an off-centered plot, which is a graphical representation of the set of radiuses versus the set of orientations. The method more over includes calculating the process center by applying a curve-fitting equation to the off-centered plot.
    Type: Application
    Filed: December 18, 2006
    Publication date: April 3, 2008
    Inventors: Jack Chen, Andrew D. Bailey, Ben Mooring, Stephen J. Cain
  • Publication number: 20080080845
    Abstract: A bevel inspection module for capturing images of a substrate is provided. The module includes a rotational motor, which is attached to a substrate chuck and is configured to rotate the substrate chuck thereby allowing the substrate to revolve. The module further includes a camera and an optic enclosure, which is attached to the camera and is configured to rotate, enabling light to be directed toward the substrate. The camera is mounted from a camera mount, which is configured to enable the camera to rotate on a 180 degree plane allowing the camera to capture images of at least one of a top view, a bottom view, and a side view of the substrate. The module yet also includes a backlight arrangement, which is configured to provide illumination to the substrate, thereby enabling the camera to capture the images, which shows contrast between the substrate and a background.
    Type: Application
    Filed: December 18, 2006
    Publication date: April 3, 2008
    Inventors: Jack Chen, Andrew D. Bailey, Ben Mooring, Stephen J. Cain
  • Publication number: 20040248408
    Abstract: A system and method for planarizing a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple of features in the pattern. The conductive interconnect material having an overburden portion. The overburden portion having a localized non-uniformity. A bulk portion of the overburden portion is removed to planarize the overburden portion. The substantially locally planarized overburden portion is mapped to determine a global non-uniformity. The substantially locally planarized overburden portion is etched to substantially remove the global non-uniformity.
    Type: Application
    Filed: March 14, 2003
    Publication date: December 9, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Shrikant P. Lohokare, Andrew D. Bailey, David Hemker, Joel M. Cook
  • Publication number: 20040216676
    Abstract: The invention provides a method, for processing a substrate. The substrate is placed in a chamber, where the chamber comprises a substrate holder within the chamber and a dielectric window forming a side of the chamber. A gas is provided into the chamber. An antenna is used to generate an azimuthally symmetric electric field. A substantially azimuthally symmetric plasma is formed from the gas using the azimuthally symmetric electric field. A substantially uniform process rate is produced across a surface of a substrate.
    Type: Application
    Filed: February 13, 2004
    Publication date: November 4, 2004
    Inventors: Mark H. Wilcoxson, Andrew D. Bailey
  • Publication number: 20040180545
    Abstract: A system and method for planarizing a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple of features in the pattern. The conductive interconnect material having an overburden portion. The overburden portion includes a localized non-uniformity. An additional layer is formed on the overburden portion. The additional layer and the overburden portion are planarized. The planarizing process substantially entirely removes the additional layer.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 16, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Shrikant P. Lohokare, Andrew D. Bailey, David Hemker, Joel M. Cook
  • Publication number: 20040085246
    Abstract: An antenna arrangement for generating an rf field distribution at a plasma generating region inside a chamber wall of a process chamber of a plasma processing apparatus is described. The antenna arrangement includes an rf inductive antenna to which an rf power supply can be connected to supply an rf current to generate a first rf field extending into the plasma generating region. A passive antenna is also provided which is inductively coupled to the rf inductive antenna and configured to generate a second rf field modifying the first rf field. The rf field distribution at the plasma generating region increases the processing uniformity of the processing apparatus compared to that in the absence of the passive antenna.
    Type: Application
    Filed: July 22, 2002
    Publication date: May 6, 2004
    Applicant: Lam Research Corporation
    Inventors: Arthur M. Howald, Andras Kuthi, Mark Henry Wilcoxson, Andrew D. Bailey
  • Publication number: 20040070623
    Abstract: A graphical user interface for controlling analysis of a wafer map is provided. The user interface provides a graphical selection control for selecting a region of the wafer map for statistical analysis. The user interface is configured to generate statistical data for the selected region to complete the statistical analysis. The statistical data is then displayed for the selected region. Re-generation of the statistical data for display is performed upon detecting a change in the selected region.
    Type: Application
    Filed: December 24, 2002
    Publication date: April 15, 2004
    Applicant: Lam Research Corporation
    Inventors: Jorge Luque, Andrew D. Bailey, Mark Wilcoxson
  • Publication number: 20040064465
    Abstract: A method for adjusting a data set defining a set of process runs, each process run having a set of data corresponding to a set of variables for a wafer processing operation is provided. A model derived from a data set is received. A new data set corresponding to one process run is received. The new data set is projected to the model. An outlier data point produced as a result of the projecting is identified. A variable corresponding to the one outlier data point is identified, the identified variable exhibiting a high contribution. A value for the variable from the new data set is identified. Whether the value for the variable is unimportant is determined. A normalized matrix of data is created, using random data and the variable that was determined to be unimportant from each of the new data set and the data set. The data set is updated with the normalized matrix of data.
    Type: Application
    Filed: December 20, 2002
    Publication date: April 1, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Puneet Yadav, Andrew D. Bailey
  • Publication number: 20040063230
    Abstract: A system and method of for determining multiple uniformity metrics of a semiconductor wafer manufacturing process includes collecting a quantity across each one of a group of semiconductor wafers. The collected quantity data is scaled and a principal component analysis (PCA) is performed on the collected, scaled quantity data to produce a first set of metrics for the first group of semiconductor wafers. The first set of metrics including a first loads matrix and a first scores matrix.
    Type: Application
    Filed: December 23, 2002
    Publication date: April 1, 2004
    Applicant: Lam Research Corporation
    Inventors: Andrew D. Bailey, Puneet Yadav, Pratik Misra
  • Publication number: 20040011467
    Abstract: A plasma processing system for processing a substrate, is disclosed. The plasma processing system includes a single chamber, substantially azimuthally symmetric plasma processing chamber within which a plasma is both ignited and sustained for the processing. The plasma processing chamber has no separate plasma generation chamber. The plasma processing chamber has an upper end and a lower end. The plasma processing chamber includes a material that does not substantially react with the reactive gas chemistries that are delivered into the plasma processing chamber. In addition, the reactant gases that are flown into the plasma processing chamber are disclosed.
    Type: Application
    Filed: July 11, 2003
    Publication date: January 22, 2004
    Inventors: David J. Hemker, Mark H. Wilcoxson, Andrew D. Bailey, Alan M. Schoepp
  • Publication number: 20030205327
    Abstract: A plasma processing chamber for processing a substrate to form electronic components thereon is disclosed. The plasma processing chamber includes a plasma-facing component having a plasma-facing surface oriented toward a plasma in the plasma processing chamber during processing of the substrate, the plasma-facing component being electrically isolated from a ground terminal. The plasma processing chamber further includes a grounding arrangement coupled to the plasma-facing component, the grounding arrangement including a first resistance circuit disposed in a first current path between the plasma-facing component and the ground terminal. The grounding arrangement further includes a RF filter arrangement disposed in at least one other current path between the plasma-facing component and the ground terminal, wherein a resistance value of the first resistance circuit is selected to substantially eliminate arcing between the plasma and the plasma-facing component during the processing of the substrate.
    Type: Application
    Filed: May 6, 2002
    Publication date: November 6, 2003
    Inventors: Arthur M. Howald, Andras Kuthi, Andrew D. Bailey, Butch Berney
  • Publication number: 20030189524
    Abstract: An antenna arrangement for generating an electric field inside a process chamber through a window. Generally, the antenna arrangement comprises an outer loop, comprising a first outer loop turn disposed around an antenna axis, an inner loop, comprising a first inner loop turn disposed around the antenna axis, wherein the inner loop is closer to the antenna axis than the outer loop is to the antenna axis in each azimuthal direction, and a radial connector radially electrically connecting the outer loop to the inner loop, wherein the radial connector is placed a large distance from the window.
    Type: Application
    Filed: February 24, 2003
    Publication date: October 9, 2003
    Applicant: Lam Research Corporation
    Inventors: Mark H. Wilcoxson, Andrew D. Bailey
  • Publication number: 20030155079
    Abstract: A plasma processing system that includes a plasma processing chamber that provides enhanced control over an etch process is disclosed. The plasma processing chamber is connected to a gas flow system. The gas flow system can be employed to control the release of gases into different regions within the plasma processing chamber. In addition, the volume of the released gas, e.g., the flow rate of the gas, can be adjusted by a gas flow control mechanism. In this manner, both the position and the amount of the gas that is delivered to the plasma processing chamber can be controlled. The ability to adjust the position and the amount of gas that is released into the plasma processing chamber provides for a better control over the distribution of the neutral components. This in turn enhances control over the etching process.
    Type: Application
    Filed: November 15, 1999
    Publication date: August 21, 2003
    Inventors: ANDREW D. BAILEY, ALAN M. SCHOEPP, DAVID J. HEMKER, MARK H. WILCOXSON
  • Publication number: 20030145952
    Abstract: An antenna arrangement for generating an electric field inside a process chamber is provided. Generally, the antenna arrangement comprises a first loop disposed around an antenna axis. The first loop comprises a first turn with a first turn gap; a second turn with a second turn gap, where the second turn is concentric and coplanar with the first turn and spaced apart from the first turn, and where the antenna axis passes through the center of the first turn and second turn; and a first turn-second turn connector electrically connected between a second end of the first turn and a first end of the second turn comprising a spanning section between and coplanar with the first turn and the second turn and which spans the first turn gap and the second turn gap.
    Type: Application
    Filed: December 19, 2002
    Publication date: August 7, 2003
    Applicant: Lam Research Corporation
    Inventors: Mark H. Wilcoxson, Andrew D. Bailey, Andras Kuthi, Michael G.R. Smith, Alan M. Schoepp