Patents by Inventor Andrew D. Koehler

Andrew D. Koehler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10777644
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 15, 2020
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20190360117
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Application
    Filed: May 23, 2019
    Publication date: November 28, 2019
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Sam Graham, JR., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20190305157
    Abstract: An extreme ultraviolet (EUV) photodetector is formed by providing a substrate having a first doping type of material; forming a photodetector body layer having the first doping type of material over the substrate, wherein the photodetector body layer includes a carrier collection region and a potential barrier maximum level; and forming a carrier collection material layer over the photodetector body layer. The carrier collection region includes a region between the potential barrier maximum level and the carrier collection material layer. The potential barrier maximum level includes a height within the photodetector body layer that prevents photogenerated carriers created at a depth deeper than the potential barrier maximum level from transporting to the carrier collection region and the carrier collection material layer.
    Type: Application
    Filed: April 2, 2018
    Publication date: October 3, 2019
    Inventors: Francis J. Kub, Travis J. Anderson, Karl D. Hobart, Andrew D. Koehler
  • Patent number: 10424643
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: September 24, 2019
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Publication number: 20190252501
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Patent number: 10312175
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: June 4, 2019
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Publication number: 20190157181
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Application
    Filed: April 5, 2018
    Publication date: May 23, 2019
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Patent number: 10229839
    Abstract: An method of annealing by: providing a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; depositing a layer of a transition metal nitride directly on the surface; and annealing the substrate at at least 900° C. in an oxygen-free environment. An article having: a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; and a layer of a transition metal nitride directly on the surface.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: March 12, 2019
    Assignee: The United States of America, as Represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Boris N. Feygelson, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Jordan Greenlee
  • Patent number: 10158009
    Abstract: A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: December 18, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Andrew D. Koehler
  • Publication number: 20180315820
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 10002958
    Abstract: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 19, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Virginia D. Wheeler, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 9991354
    Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: June 5, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
  • Patent number: 9960266
    Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: May 1, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20170358670
    Abstract: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 14, 2017
    Inventors: Francis J. Kub, Travis J. Anderson, Virginia D. Wheeler, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20170338332
    Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 23, 2017
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20170330950
    Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 16, 2017
    Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
  • Publication number: 20170316952
    Abstract: An method of annealing by: providing a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; depositing a layer of a transition metal nitride directly on the surface; and annealing the substrate at at least 900° C. in an oxygen-free environment. An article having: a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; and a layer of a transition metal nitride directly on the surface.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 2, 2017
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Boris N. Feygelson, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Jordan Greenlee
  • Publication number: 20170125557
    Abstract: A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith.
    Type: Application
    Filed: January 18, 2017
    Publication date: May 4, 2017
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Andrew D. Koehler
  • Patent number: 9590081
    Abstract: A method of making a graphene base transistor with reduced collector area comprising forming a graphene material layer, forming a collector material, depositing a dielectric, planarizing the dielectric, cleaning and removing the native oxide, transferring a base graphene material layer to the top surface of the graphene material layer, bonding the base graphene material layer, and photostepping and defining a second graphene material layer. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region. A graphene base transistor with reduced collector area comprising an electron emitter region, an electron collection region, and a base region.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: March 7, 2017
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Andrew D. Koehler
  • Patent number: 9490356
    Abstract: Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the gate metal and/or the passivation material used, the III-nitride passivation layer can be formed by ALE at temperatures between about 300° C. and about 85020 C. In a specific embodiment, the III-nitride passivation layer can be an AlN layer formed by ALE at about 550° C. after deposition of a Schottky metal gate electrode. The III-nitride passivation layer can be grown so as to conformally cover the entire device, providing a hermetic seal that protects the against environmental conditions.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: November 8, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart, Francis J. Kub