Abstract: Method and apparatus for signal reflection removal, such as echo cancellation, is described. Signal samples are delayed. The delays allow burst processing of consecutive samples of transmitting and receiving signals in a communication network, such as in a telephone communication system. As a result, there is tremendous reduction of memory bandwidth when compared to conventional sample-by-sample processing of signals. Echo cancellers described herein can be implemented in an FPGA. Echo in over a thousand channels can be cancelled using an FPGA and an external memory device. In embodiments for reflected signal cancellation, multiple stages of echo estimation are used.

Abstract: Method and apparatus for signal reflection removal, such as echo cancellation, is described. Signal samples are delayed. The delays allow burst processing of consecutive samples of transmitting and receiving signals in a communication network, such as in a telephone communication system. As a result, there is tremendous reduction of memory bandwidth when compared to conventional sample-by-sample processing of signals. Echo cancellers described herein can be implemented in an FPGA. Echo in over a thousand channels can be cancelled using an FPGA and an external memory device. In embodiments for reflected signal cancellation, multiple stages of echo estimation are used.