Patents by Inventor Andrew David Bain

Andrew David Bain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10043792
    Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: August 7, 2018
    Assignee: Analog Devices, Inc.
    Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
  • Publication number: 20170117266
    Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
    Type: Application
    Filed: November 8, 2016
    Publication date: April 27, 2017
    Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
  • Patent number: 9520486
    Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: December 13, 2016
    Assignee: Analog Devices, Inc.
    Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
  • Patent number: 8513713
    Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: August 20, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Paul Malachy Daly, Andrew David Bain, Derek Frederick Bowers, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
  • Patent number: 8390039
    Abstract: A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Derek Frederick Bowers, Andrew David Bain, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
  • Patent number: 8357985
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson
  • Patent number: 8350352
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson
  • Patent number: 8263469
    Abstract: A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: September 11, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Bernard Patrick Stenson, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, William Allan Lane
  • Publication number: 20120217551
    Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.
    Type: Application
    Filed: May 10, 2012
    Publication date: August 30, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Paul Malachy Daly, Andrew David Bain, Derek Frederick Bowers, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, Bernard Patrick Stenson, William Allan Lane
  • Patent number: 8193046
    Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: June 5, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Paul Malachy Daly, Andrew David Bain, Derek Frederick Bowers, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
  • Publication number: 20120112307
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Application
    Filed: January 13, 2012
    Publication date: May 10, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson
  • Patent number: 8120136
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: February 21, 2012
    Assignee: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, Bernard Patrick Stenson
  • Publication number: 20120028432
    Abstract: A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor.
    Type: Application
    Filed: October 6, 2011
    Publication date: February 2, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Bernard Patrick Stenson, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, William Allan Lane
  • Patent number: 8058704
    Abstract: A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: November 15, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Bernard Patrick Stenson, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, William Allan Lane
  • Publication number: 20110101424
    Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Applicant: ANALOG DEVICES, INC.
    Inventors: Paul Malachy Daly, Andrew David Bain, Derek Frederick Bowers, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
  • Publication number: 20110101423
    Abstract: A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Applicant: ANALOG DEVICES, INC.
    Inventors: Derek Frederick Bowers, Andrew David Bain, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
  • Publication number: 20110101486
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Applicant: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, Bernard Patrick Stenson
  • Publication number: 20110101500
    Abstract: A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Applicant: Analog Devices, Inc.
    Inventors: Bernard Patrick Stenson, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuiness, William Allan Lane
  • Publication number: 20110101444
    Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
    Type: Application
    Filed: November 4, 2009
    Publication date: May 5, 2011
    Applicant: Analog Devices, Inc.
    Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
  • Patent number: 7807972
    Abstract: The invention provides a sensor including a first sensor element formed in a first substrate and at least one optical element formed in a second substrate, the first and second substrates being configured relative to one another such that the second substrate forms a cap over the first sensor element. The cap includes a diffractive optical element and an aperture stop which collectively determine the wavelength of incident radiation that is allowed through the cap and onto the at least one optical element.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: October 5, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Paul Lambkin, William A. Lane, Andrew David Bain