Patents by Inventor Andrew Dunshea

Andrew Dunshea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080072228
    Abstract: A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.
    Type: Application
    Filed: November 21, 2007
    Publication date: March 20, 2008
    Inventors: Jos Accapadi, Andrew Dunshea, Dirk Michel, James Van Fleet
  • Patent number: 7337276
    Abstract: A computer implemented method, apparatus, and computer usable code for managing cache data. A partition identifier is associated with a cache entry in a cache, wherein the partition identifier identifies a last partition accessing the cache entry. The partition identifier associated with the cache entry is compared with a previous partition identifier located in a processor register in response to the cache entry being moved into a lower level cache relative to the cache. The cache entry is marked if the partition identifier associated with the cache entry matches the previous partition identifier located in the processor register to form a marked cache entry, wherein the marked cache entry is aged at a slower rate relative to an unmarked cache entry.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: February 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jos Accapadi, Andrew Dunshea, Greg R. Mewhinney, Mysore Sathyanaranyana Srinivas
  • Patent number: 7318142
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: January 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Andrew Dunshea, Li Li, Grover Herbert Neuman, Mysore Sathyanarayana Srinivas, David Alan Hepkin
  • Publication number: 20070294521
    Abstract: Methods, systems, and media are disclosed for improved granularity of a response-request communication on a networked computer system. One example embodiment includes receiving the request-response communication by the networked computer system, and associating the request-response communication with a port, having a nodelay setting, from a set of ports on the networked computer system. Further, the example embodiment includes enabling, based upon the associating, the nodelay setting upon connection of the request-response communication with the port. Further still, the example embodiment includes sending, in accordance with the enabling, the request-response communication to a destination in communication with the networked computer system.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 20, 2007
    Inventors: Jos Accapadi, Kavitha Baratakke, Andrew Dunshea, Venkat Venkatsubra
  • Publication number: 20070288941
    Abstract: Sharing kernel services among kernels, including receiving, by a partition manager from an application in a logical partition, a first system call for a kernel service from a first kernel, the first system call having form and content compatible with the first kernel, generating, in dependence upon the first system call, a second system call for the kernel service from a second kernel, the second system call having form and content compatible with the second kernel, and sending the second system call through the partition manager to the second kernel for execution.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 13, 2007
    Inventors: Andrew Dunshea, Diane G. Flemming
  • Patent number: 7278141
    Abstract: A system and method is altering the priority of a process, or thread of execution, when the process acquires a software lock. The priority is altered when the lock is acquired and restored when the process releases the lock. Thread priorities can be altered for every lock being managed by the operating system or can selectively be altered. In addition, the amount of alteration can be individually adjusted so that a process that acquires one lock receive a different priority boost than a process that acquires a different lock. Furthermore, a method of tuning a computer system by adjusting lock priority values is provided.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: October 2, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Andrew Dunshea, Dirk Michel, James W. Van Fleet
  • Patent number: 7275151
    Abstract: Methods, systems, and media are disclosed for improved granularity of a response-request communication on a networked computer system. One example embodiment includes receiving the request-response communication by the networked computer system, and associating the request-response communication with a port, having a nodelay setting, from a set of ports on the networked computer system. Further, the example embodiment includes enabling, based upon the associating, the nodelay setting upon connection of the request-response communication with the port. Further still, the example embodiment includes sending, in accordance with the enabling, the request-response communication to a destination in communication with the networked computer system.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: September 25, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Kavitha Vittal Murthy Baratakke, Andrew Dunshea, Venkat Venkatsubra
  • Publication number: 20070168434
    Abstract: A computer implemented method, apparatus, and computer usable program code for saving information from an email message. The information is selected from the email message to form selected information. The selected information and header information is saved in the email message. The header information is designated through a user preference.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 19, 2007
    Inventors: Jos Accapadi, Andrew Dunshea
  • Publication number: 20070136721
    Abstract: Sharing a kernel of an operating system among logical partitions, including installing in a partition manager a kernel of a type used by a plurality of logical partitions; installing in the partition manager generic data structures specifying computer resources assigned to each of the plurality of logical partitions; and providing, by the kernel to the logical partitions, kernel services in dependence upon the generic data structures.
    Type: Application
    Filed: December 12, 2005
    Publication date: June 14, 2007
    Inventors: Andrew Dunshea, Diane Flemming
  • Publication number: 20070136725
    Abstract: A system and method is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.
    Type: Application
    Filed: December 12, 2005
    Publication date: June 14, 2007
    Inventors: Jos Accapadi, Matthew Accapadi, Andrew Dunshea, Dirk Michel
  • Publication number: 20070101052
    Abstract: A system and method for implementing a fast file synchronization in a data processing system. A memory management unit divides a file stored in system memory into a collection of data block groups. In response to a master (e.g., processing unit, peripheral, etc.) modifying a first data block group among the collection of data block groups, the memory management unit writes a first block group number associated with the first data block group to system memory. In response to a master modifying a second data block group, the memory management unit writes the first data block group to a hard disk drive and writes a second data block group number associated with the second data block group to system memory. In response to a request to update modified data block groups of the file stored in the system memory to the hard disk drive, the memory management unit writes the second data block to the hard disk drive.
    Type: Application
    Filed: October 27, 2005
    Publication date: May 3, 2007
    Inventors: Jos Accapadi, Mathew Accapadi, Andrew Dunshea, Dirk Michel
  • Publication number: 20070061423
    Abstract: A method, system, and program for facilitating presentation and monitoring of electronic mail messages with reply by constraints are provided. Within a network environment, a server receives electronic mail messages with separate selected reply by dates, wherein each electronic mail message is addressed for delivery by the server to at least one particular recipient. The server enables, for display within a user interface accessible to the particular recipient, a separate record for each electronic mail message within an inbox. The inbox include at least one selectable sublevel, wherein upon selection of the particular selectable sublevel of the inbox, only a selection of records for electronic mail messages with a same reply by date as the selectable sublevel are displayed within the user interface.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Jos Accapadi, Andrew Dunshea
  • Publication number: 20070055788
    Abstract: An improved method in a data processing system for forwarding network file system requests and responses between network segments. A notice is received that data has arrived at a receive buffer for a socket. The receive buffer is connected for the socket and a send buffer for another socket to form a splice. Both the socket and the other socket are flagged as a spliced connection.
    Type: Application
    Filed: August 11, 2005
    Publication date: March 8, 2007
    Inventors: Andrew Dunshea, Agustin Mena, Venkat Venkatsubra
  • Publication number: 20070038809
    Abstract: A computer implemented method, apparatus, and computer usable code for managing cache data. A partition identifier is associated with a cache entry in a cache, wherein the partition identifier identifies a last partition accessing the cache entry. The partition identifier associated with the cache entry is compared with a previous partition identifier located in a processor register in response to the cache entry being moved into a lower level cache relative to the cache. The cache entry is marked if the partition identifier associated with the cache entry matches the previous partition identifier located in the processor register to form a marked cache entry, wherein the marked cache entry is aged at a slower rate relative to an unmarked cache entry.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 15, 2007
    Inventors: Jos Accapadi, Andrew Dunshea, Greg Mewhinney, Mysore Srinivas
  • Publication number: 20070033371
    Abstract: A computer implemented method, apparatus, and computer usable code for managing cache information in a logical partitioned data processing system. A determination is made as to whether a unique identifier in a tag associated with a cache entry in a cache matches a previous unique identifier for a currently executing partition in the logical partitioned data processing system when the cache entry is selected for removal from the cache, and saves the tag in a storage device if the partition identifier in the tag matches the previous unique identifier.
    Type: Application
    Filed: August 4, 2005
    Publication date: February 8, 2007
    Inventors: Andrew Dunshea, Greg Mewhinney, Mysore Srinivas
  • Publication number: 20060288186
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Application
    Filed: August 8, 2006
    Publication date: December 21, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jos Accapadi, Andrew Dunshea, Li Li, Grover Neuman, Mysore Srinivas, David Hepkin
  • Publication number: 20060277551
    Abstract: Administration of locks for critical sections of computer programs in a computer that supports a multiplicity of logical partitions that include determining by a thread executing on a virtual processor executing in a time slice on a physical processor whether an expected lock time for a critical section of the thread exceeds a remaining entitlement of the virtual processor in the time slice and deferring acquisition of a lock if the expected lock time exceeds the remaining entitlement.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 7, 2006
    Inventors: Jos Accapadi, Andrew Dunshea, Sujatha Kashyap
  • Publication number: 20060230247
    Abstract: A method, system, device, and article of manufacture for use in a computer memory system utilizing multiple page types, for handling a memory resource request. In a accordance with the method of the invention, a request is received for allocation of pages having a first page type. The first page type has a specified allocation limit. A determination is made in response to the page allocation request of whether the number of allocated pages of the first page type exceeds or is below the allocation limit. In response to determining that the number of allocated pages of said first page type is below the allocation limit, the virtual memory manager enables allocation of pages for the request to exceed the allocation limit.
    Type: Application
    Filed: April 12, 2005
    Publication date: October 12, 2006
    Applicant: International Business Machines Corporation
    Inventors: Andrew Declercq, Andrew Dunshea, Matthew Harding, Zachary Loafman
  • Patent number: 7120753
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Andrew Dunshea, Li Li, Grover Herbert Neuman, Mysore Sathyanarayana Srinivas, David Alan Hepkin
  • Patent number: 7080220
    Abstract: A method, apparatus, processor, system, and signal-bearing medium that in an embodiment determine which page to replace in memory when the memory is full based on reference and re-reference indicators in page table entries. In an embodiment, a reference indicator in an entry is set when its associated page is accessed in memory and the reference indicator was previously clear. The re-reference indicator in an entry is set when its associated page is accessed and the reference indicator was previously set. Both the reference and re-reference indicators are cleared if their associated page is accessed and both were previously set. When a new page is accessed and the memory is full, a page in the memory is not available for replacement if both its reference and its re-reference indicators are set. Otherwise, the page is available for replacement.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: July 18, 2006
    Assignee: International Business Machines Corporation
    Inventors: Andrew Dunshea, Dirk Michel