Patents by Inventor Andrew Flint

Andrew Flint has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030046223
    Abstract: The invention comprises a method and apparatus for explaining credit scores, for example in connection with a credit score explanation service, in which consumers can identify the sources of information used to establish their credit score, supply their credit report and credit score information in connection with their application for credit-related products and services, such as loans, and determine the effect on their credit score and cost for credit-related products and services based upon various hypothetical changes in their credit behavior.
    Type: Application
    Filed: June 25, 2002
    Publication date: March 6, 2003
    Inventors: Stuart Crawford, Andrew Flint, Sharon Anne Hatcher, Keith Owen Hillestad, Thomas J. Quinn, Michael William Rapaport, Sue Ann Simon, Michael Scott Steele, Cheryl Lynn St. John
  • Patent number: 6453419
    Abstract: A system and method of implementing a security policy, comprising the steps of providing a plurality of access policies, defining a process and connecting the access policies and the process to form a security policy.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: September 17, 2002
    Assignee: Secure Computing Corporation
    Inventors: Andrew Flint, Irving Reid, Gene Amdur
  • Patent number: 5568492
    Abstract: A multichip module (10) having one or more IC die (12-18) supports JTAG testing with a plurality of registers (20-26) within each IC die. JTAG testing requires a one cycle delay bypass mode where registers within an IC not under test are bypassed. To support bypass mode when JTAG testing the multichip module on a printed circuit board, a bypass circuit around the multichip module provides the one cycle delay. The bypass circuit monitors the test data signals to the multichip module and enters bypass mode upon detecting a predetermined sequence of logic states during the instruction sequence. Otherwise, the test data signal passes through a plurality of registers within each IC die. The detection may be performed by counting logic states or otherwise monitoring in the instruction sequence.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: October 22, 1996
    Assignee: Motorola, Inc.
    Inventors: Andrew Flint, James R. Trent, Jerome A. Grula