Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.

Abstract: A system, device and method are described that provide dynamic calibration of high-speed systems, such as high-speed DDR memory systems. In accordance with certain embodiments of the invention, a DDR controller includes functionality that both initializes settings associated with a data window and dynamically maintains the data window within a defined threshold of operation. In various embodiments, an initial calibration module is provided on the DDR controller for performing a full calibration wherein a data window is initially generated and a center point of the data window is established within a specified threshold. Interrupts may be generated to evaluate the data window and center point and/or recalibrate the data window and center point in response to the evaluation or an interrupt generated from another source, such as a system error or user generated interrupt. If a timer expiration interrupt occurs, the data window and its center point are re-evaluated.

Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.

Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.

Abstract: An integrated circuit and associated methods operable therein to provide hardware assist to RAID storage management controllers. The RAID assist integrated circuit offloads a general purpose processor of the storage controller from the responsibility and processing associated with address mapping. RAID geometry and addressing parameters may be stored in a register file or similar storage associated with the RAID assist integrated circuit so as to permit logic therein to automatically map host request parameters to corresponding low level device commands and status. The RAID assist integrated circuit may incorporate scatter/gather list processing features and address mapping features. Queue management features may also be integrated therein to provide buffered queueing of commands and status exchanged between the host system and the storage controller. In addition, host interface features, storage device interface features and RAID redundancy (e.g.

Abstract: A data stream is transferred through a parallel data bus while the read or write strobe is adjusted. The resultant data is compared to the original data to detect errors with each data line of the parallel bus. The results are displayed on a grid whereby the characteristics of each line of the data bus may be visually understood. The characteristic image of the performance of the data bus may be used for debugging the bus, as well as for other uses wherein the performance is very highly characterized.

Abstract: A method, system, and computer readable medium varies parameter data for a device under test. Parameters may be successively retrieved and set to a specified or random value. A state machine for operating, testing, and/or simulating a device under test using common code that is function specific. The state machine is built through inputting parameter information into the common code. Each state of the state machine has a unique set of parameters that define the state of the machine at that state. Pointers and status functions are preferably used to build and maintain the state machine.

Abstract: The present invention is a bus reset generator capable of asserting a reset upon detection of a desired phase. The bus reset generator may analyze control signals from a bus, and based upon the control signals may determine the current phase of the bus. If the current phase is the desired phase for a reset, then a reset may be asserted. If the current phase is not the desired phase, the bus reset generator may continue to find the desired phase.

Abstract: A method and system for controlling and normalizing a rate of a process is described. A hidden process is executed a predetermined number of times as a loop value, and a visual process is executed to complete a cycle. The time to complete a cycle is measured, and an updated loop value is calculated. In a subsequent cycle, the hidden process is executed a number of times equal to the updated loop value so that the visual process is executed at a desired rate normalized across all computing platforms, configuration, and performance environments. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other researcher to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).

Abstract: A data stream is transferred through a parallel data bus while the read or write strobe is adjusted. The resultant data is compared to the original data to detect errors with each data line of the parallel bus. The results are displayed on a grid whereby the characteristics of each line of the data bus may be visually understood. The characteristic image of the performance of the data bus may be used for debugging the bus, as well as for other uses wherein the performance is very highly characterized.

Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.

Abstract: Disclosed is a system and method for determining the configuration of a personal computer and storing the configuration for further use, such as administrative analyses. The configuration of a personal computer may be stored locally or in a database located on a network and shared with a plurality of other personal computers.

Abstract: Control signals of an I/O or peripheral bus are sensed during cycles of the bus and information describing bus phases of the signals is derived by sensing the control signals and is stored in a register. During a sampling time period, a processor reads the bus phase information from the register and computes bus activity information by using the bus phase information. The computed bus information is continuously updated and displayed to reflect actual communication activity on the bus occurring substantially in real-time.

Abstract: An improved PCI verification method and apparatus provides iterative testing of all desired conditions or protocol combinations in a PCI system. One or more commands may be tested in combination with one or more functional behavior parameters throughout a desired range of variable parameter values. In one aspect, an apparatus and method for testing a PCI device for compliance under the PCI specification in target operation is provided. In another aspect, an apparatus and method for testing a PCI device for compliance under the PCI specification in master operation is provided.