Patents by Inventor Andrew Harley

Andrew Harley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8880356
    Abstract: A method and system for spectrum data analysis. The method comprises the steps of collecting a spectrum of an unknown material; providing a set of data templates; calculating weighting factors for the element data templates to minimize error in approximating the spectrum; removing one or more of the templates having negative weights in approximating the spectrum; and re-calculating an approximation of the spectrum with said one or more templates removed. Embodiments of the invention are suitable for analyzing noisy spectra having relatively few data points.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: November 4, 2014
    Assignee: Fei Company
    Inventors: Daniel Roy Corbett, Paul Gottlieb, Andrew Harley Menzies, Michael James Owen
  • Publication number: 20110144922
    Abstract: A method and system for spectrum data analysis. The method comprises the steps of collecting a spectrum of an unknown material; providing a set of data templates; calculating weighting factors for the element data templates to minimize error in approximating the spectrum; removing one or more of the templates having negative weights in approximating the spectrum; and re-calculating an approximation of the spectrum with said one or more templates removed. Embodiments of the invention are suitable for analyzing noisy spectra having relatively few data points.
    Type: Application
    Filed: February 6, 2009
    Publication date: June 16, 2011
    Applicant: FEI COMPANY
    Inventors: Daniel Roy Corbett, Paul Gottlieb, Michael James Owen, Andrew Harley Menzies
  • Patent number: 5774473
    Abstract: A scan latch comprises a plurality of capture half-latches connected in parallel between an input node and an intermediate node and a release half-latch connected between the intermediate node and a scan output node, each capture half-latch having a control terminal, a capture select terminal and a release select terminal. The control terminals receive a common timing control signal. The capture select terminals receive respective capture select signals for controlling the capture of data inputted to the scan latch. The release select terminals receive respective release select signals for controlling the release of data from the capture half-latches. The scan latch also comprises a control circuit for generating release select signals and capture select signals for selectively controlling the capture half-latches in a normal functional mode of operation.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: June 30, 1998
    Assignee: SGS-Thomson Microelectronics Limited
    Inventor: Andrew Harley