Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned.

Abstract: A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration.

Abstract: A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned.

Abstract: A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned.

Abstract: A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration.

Abstract: A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers.

Abstract: A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned.