Patents by Inventor Andrew J. Morrish

Andrew J. Morrish has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10224820
    Abstract: A circuit for regulating an output level of a power converter includes an adjustment circuit to be coupled to a receive a feedback signal representative of an output level of the power converter. The adjustment circuit is coupled to generate a comparison result signal. A control circuit is coupled to receive the comparison result signal and an oscillating signal. A switch including a first terminal, a second terminal and a control terminal is coupled to the control circuit. The control circuit is coupled to generate a control signal to control switching of the switch. The switch is operable to couple or decouple the first terminal and the second terminal in response to the control signal received at the control terminal. The control signal is responsive to the oscillating signal and to a change in the comparison result signal.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: March 5, 2019
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Patent number: 9853119
    Abstract: Monolithic integration of low-capacitance p-n junctions and low-resistance p-n junctions (when conducting in reverse bias) is provided. Three epitaxial layers are used. The low-capacitance junctions are formed by the top two epitaxial layers. The low-resistance p-n junction is formed in the top epitaxial layer, and two buried structures at interfaces between the three epitaxial layers are used to provide a high doping region that extends from the low-resistance p-n junction to the substrate, thereby providing low resistance to current flow. The epitaxial layers are lightly doped as required by the low-capacitance junction design, so the buried structures are needed for the low-resistance p-n junction. The high doping region is formed by diffusion of dopants from the substrate and from the buried structures during thermal processing.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: December 26, 2017
    Assignee: Bourns, Inc.
    Inventors: Andrew J. Morrish, Tao Wei
  • Publication number: 20170084716
    Abstract: Monolithic integration of low-capacitance p-n junctions and low-resistance p-n junctions (when conducting in reverse bias) is provided. Three epitaxial layers are used. The low-capacitance junctions are formed by the top two epitaxial layers. The low-resistance p-n junction is formed in the top epitaxial layer, and two buried structures at interfaces between the three epitaxial layers are used to provide a high doping region that extends from the low-resistance p-n junction to the substrate, thereby providing low resistance to current flow. The epitaxial layers are lightly doped as required by the low-capacitance junction design, so the buried structures are needed for the low-resistance p-n junction. The high doping region is formed by diffusion of dopants from the substrate and from the buried structures during thermal processing.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Inventors: Andrew J. Morrish, Tao Wei
  • Publication number: 20170025959
    Abstract: A circuit for regulating an output level of a power converter includes an adjustment circuit to be coupled to a receive a feedback signal representative of an output level of the power converter. The adjustment circuit is coupled to generate a comparison result signal. A control circuit is coupled to receive the comparison result signal and an oscillating signal. A switch including a first terminal, a second terminal and a control terminal is coupled to the control circuit. The control circuit is coupled to generate a control signal to control switching of the switch. The switch is operable to couple or decouple the first terminal and the second terminal in response to the control signal received at the control terminal. The control signal is responsive to the oscillating signal and to a change in the comparison result signal.
    Type: Application
    Filed: October 7, 2016
    Publication date: January 26, 2017
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Patent number: 9484824
    Abstract: An on/off controller device includes a control circuit to generate a control signal to switch a power switch between an on state and an off state to transfer energy from a primary side to a secondary side of a switched mode power supply. A comparator is coupled to generate an enable signal that enables and disables the switching of the power switch by the control circuit. The comparator compares a feedback signal with a variable threshold and switches the enable signal between enabling and disabling the switching of the power switch. The variable threshold is modulated to increase a fundamental frequency of the switching of the power switch by the control circuit. The variable threshold is modulated with a fixed amplitude pulse that is combined with a second threshold to modulate the variable threshold between a first higher value and a second lower value.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: November 1, 2016
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Publication number: 20160006362
    Abstract: An AC to DC power supply is provided based on feed back control of an analog current blocking (ACB) device. The ACB element receives rectified high voltage AC. The output of the ACB element is provided to an integrating circuit that provides an output DC voltage. The output DC voltage depends on the average current passed by the ACB element. The average current passed by the ACB element depends on the current limit of the ACB element, which is under feed back control. Gain stabilization can be employed to accommodate a wide range of input voltages (e.g., for worldwide use).
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Inventor: Andrew J. Morrish
  • Publication number: 20150221630
    Abstract: Monolithic integration of low-capacitance p-n junctions and low-resistance p-n junctions (when conducting in reverse bias) is provided. Three epitaxial layers are used. The low-capacitance junctions are formed by the top two epitaxial layers. The low-resistance p-n junction is formed in the top epitaxial layer, and two buried structures at interfaces between the three epitaxial layers are used to provide a high doping region that extends from the low-resistance p-n junction to the substrate, thereby providing low resistance to current flow. The epitaxial layers are lightly doped as required by the low-capacitance junction design, so the buried structures are needed for the low-resistance p-n junction. The high doping region is formed by diffusion of dopants from the substrate and from the buried structures during thermal processing.
    Type: Application
    Filed: February 2, 2015
    Publication date: August 6, 2015
    Inventors: Andrew J. Morrish, Tao Wei
  • Publication number: 20150029768
    Abstract: An AC to DC power supply is provided based on feedback control of an analog current blocking (ACB) device. The ACB element receives rectified high voltage AC. The output of the ACB element is provided to an integrating circuit that provides an output DC voltage. The output DC voltage depends on the average current passed by the ACB element. The average current passed by the ACB element depends on the current limit of the ACB element, which is under feedback control.
    Type: Application
    Filed: July 25, 2014
    Publication date: January 29, 2015
    Inventor: Andrew J. Morrish
  • Publication number: 20140284659
    Abstract: A transient voltage suppressor (TVS) device design compatible with normal IC wafer process is provided. Instead of a thick base that requires double-sided wafer processing, a much thinner base with a modulated doping profile is used. In this base, a high doping layer is sandwiched by two lower layers of the same or different doping. The base is then sandwiched by two electrodes having opposite doping relative to the base center layer. In the base, the two lower doping layers will determine the breakdown voltage. The middle layer is used to reduce the transistor gain and thus produce an acceptable snapback characteristic. The presence of the higher doped middle layer allows the total base width to be as low as 5 ?m for a breakdown voltage of about 30 V.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Inventors: Tao Wei, Andrew J. Morrish
  • Patent number: 8724273
    Abstract: Transient blocking unit reset capability is improved by adding one or more transistors in parallel to one of the main blocking transistors of the circuit. These additional transistors switch off at higher voltages than their corresponding main blocking transistor, and have higher on-resistances than their corresponding main blocking transistor. The resulting transient blocking unit characteristic has two or more different slopes in the negative differential resistance part of the circuit I-V characteristic. This piecewise linear behavior can be exploited to ensure that the circuit I-V characteristic only has a single intersection with a normal load characteristic. By satisfying this condition, automatic reset is ensured, because the combination of the transient blocking unit with any load that is consistent with the normal load characteristic will have only one stable operating point.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: May 13, 2014
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Publication number: 20140126246
    Abstract: An on/off controller device includes a control circuit to generate a control signal to switch a power switch between an on state and an off state to transfer energy from a primary side to a secondary side of a switched mode power supply. A comparator is coupled to generate an enable signal that enables and disables the switching of the power switch by the control circuit. The comparator compares a feedback signal with a variable threshold and switches the enable signal between enabling and disabling the switching of the power switch. The variable threshold is modulated to increase a fundamental frequency of the switching of the power switch by the control circuit. The variable threshold is modulated with a fixed amplitude pulse that is combined with a second threshold to modulate the variable threshold between a first higher value and a second lower value.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Patent number: 8654547
    Abstract: In one aspect, a power supply includes an energy transfer element, a switch, a feedback circuit, a comparator, a state machine, and a control circuit. The feedback circuit generates a feedback signal representative of an output level of the power supply. The comparator provides a feedback state signal having a first feedback state that represents the output level of the power supply being above a threshold level and a second feedback state that represents the output level being below the threshold level. The state machine selectively modulates a first signal in response to the feedback state signal, where the first signal is the feedback signal or the threshold value signal. The control circuit is coupled to control switching of the switch to regulate the output level of the power supply in response to the feedback state signal.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: February 18, 2014
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Patent number: 8477515
    Abstract: An integrated circuit for use in a power supply includes a drive signal generator, a first delay, a second delay, a comparator, a first logic, a first short on time detector, and a second logic. The drive signal generator generates a drive signal to control a switch in response to a clock signal. The short on time detector sets the first latch indicating that an on time of the switch is a short on time. The second logic is coupled to detect long pulses of the drive signal to reset the first latch indicating that the on time of the switch is not a short on time. An on time of the drive signal is a short on time if a switch current of the switch exceeds a current limit after a sum of a leading edge blanking period and a current limit delay time period.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: July 2, 2013
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish
  • Publication number: 20130058138
    Abstract: An integrated circuit for use in a power supply includes a drive signal generator, a first delay, a second delay, a comparator, a first logic, a first short on time detector, and a second logic. The drive signal generator generates a drive signal to control a switch in response to a clock signal. The short on time detector sets the first latch indicating that an on time of the switch is a short on time. The second logic is coupled to detect long pulses of the drive signal to reset the first latch indicating that the on time of the switch is not a short on time. An on time of the drive signal is a short on time if a switch current of the switch exceeds a current limit after a sum of a leading edge blanking period and a current limit delay time period.
    Type: Application
    Filed: October 30, 2012
    Publication date: March 7, 2013
    Inventors: Alex B. Djenguerian, Andrew J. Morrish
  • Patent number: 8325498
    Abstract: An integrated circuit for use in a power supply includes a drive signal generator, a short on time detector, and an oscillator. The drive signal generator generates a drive signal in response to a clock signal. The short on time detector provides an output indicating that consecutive on times of the drive signal are short on times. An on time of the drive signal is a short on time if a switch current of the switch exceeds a current limit after a leading edge blanking period and if the on time of the switch is less than or equal to a sum of the leading edge blanking period and a current limit delay time period. The oscillator generates the clock signal and changes a frequency of the clock signal from a first frequency to a lower second frequency in response to the output of the short on time detector.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: December 4, 2012
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish
  • Patent number: 8300373
    Abstract: A transient blocking unit (TBU) is an arrangement of two or more transistors connected to each other in series such that they automatically switch off when a TBU current passing through these transistors exceeds a predetermined threshold. Voltage turnoff capability is provided for a TBU by adding a voltage comparison circuit to the TBU. The voltage comparison circuit provides gate voltages to one or more of the TBU transistors that tend to turn off the TBU transistors, if the voltage at the TBU output (i.e., the protected device output voltage) falls outside a predetermined range. The voltage provided by the voltage comparison circuit adds constructively to the gate voltages provided by normal TBU operation. Accordingly, TBU switch off can be driven by an over-current condition (TBU current out of range) and/or by an over-voltage condition (TBU output voltage out of range).
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Patent number: 8289667
    Abstract: A current-limiting surge protection device is provided. The current-limiting surge protection device includes a pair of series connected normally on MOSFET's and a pair of voltage controlled normally off switches that are disposed to monitor a voltage across the normally on MOSFET pair. Here, the voltage controlled normally off switches close according to an excess threshold voltage across the MOSFET pair and reduces a gate drive potential of the normally on MOSFET pair to limit a current through the normally on MOSFET pair.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: October 16, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Publication number: 20120218788
    Abstract: In one aspect, a power supply includes an energy transfer element, a switch, a feedback circuit, a comparator, a state machine, and a control circuit. The feedback circuit generates a feedback signal representative of an output level of the power supply. The comparator provides a feedback state signal having a first feedback state that represents the output level of the power supply being above a threshold level and a second feedback state that represents the output level being below the threshold level. The state machine selectively modulates a first signal in response to the feedback state signal, where the first signal is the feedback signal or the threshold value signal. The control circuit is coupled to control switching of the switch to regulate the output level of the power supply in response to the feedback state signal.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: POWER INTEGRATIONS, INC.
    Inventors: Alex B. Djenguerian, Andrew J. Morrish, Arthur B. Odell, Kent Wong
  • Publication number: 20120218675
    Abstract: Transient blocking unit reset capability is improved by adding one or more transistors in parallel to one of the main blocking transistors of the circuit. These additional transistors switch off at higher voltages than their corresponding main blocking transistor, and have higher on-resistances than their corresponding main blocking transistor. The resulting transient blocking unit characteristic has two or more different slopes in the negative differential resistance part of the circuit I-V characteristic. This piecewise linear behavior can be exploited to ensure that the circuit I-V characteristic only has a single intersection with a normal load characteristic. By satisfying this condition, automatic reset is ensured, because the combination of the transient blocking unit with any load that is consistent with the normal load characteristic will have only one stable operating point.
    Type: Application
    Filed: February 25, 2011
    Publication date: August 30, 2012
    Inventor: Andrew J. Morrish
  • Patent number: 8223467
    Abstract: An isolation device having normally off detection is provided. The isolation device having normally off detection includes a transient blocking unit (TBU) having at least one depletion mode device disposed between a pair of sense terminals, and at least one normally off transition element disposed to drive a gate of the depletion mode device in the TBU, where the normally off transition element transitions from a first resistive state to a second resistive state and one depletion mode device is connected to one sense terminal, and the normally off transition element transitions by detection of a current through the TBU. The TBU can be unidirectional or bidirectional.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: July 17, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish