Patents by Inventor Andrew J. RITENOUR

Andrew J. RITENOUR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220102566
    Abstract: The present disclosure provides a photovoltaic device formed according to a color code scheme and methods of manufacturing thereof. In an example, the photovoltaic device may include one or more photovoltaic cells formed according to one or more applications of the photovoltaic cells. The photovoltaic device may also include a rear contact layer formed on a rear surface of the one or more photovoltaic cells, the rear contact layer including one or both of a composition or a thickness configured to produce a unique color code in the color code scheme that is visible in areas of the photovoltaic device outside of areas covered by the photovoltaic cells and corresponding to the particular product configuration of the photovoltaic device. The photovoltaic device may also include a back reflector formed on a rear surface of the rear contact layer.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Inventor: Andrew J. RITENOUR
  • Patent number: 11121272
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 14, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Andrew J. Ritenour, Brendan M. Kayes, Hui Nie, Isik Kizilyalli
  • Patent number: 11075313
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: July 27, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Nikhil Jain, Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Gang He, Brendan M. Kayes
  • Patent number: 10873001
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 22, 2020
    Assignee: ALTA DEVICES, INC.
    Inventors: Nikhil Jain, Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Gang He, Brendan M. Kayes
  • Publication number: 20200365755
    Abstract: Aspects of the disclosure relate to surface passivation, and more particularly, surface passivation of optoelectronic devices made of Group III-V semiconductors. In one implementation, a method for passivating an optoelectronic device is described that includes providing a window layer of the optoelectronic device; and depositing a window passivation layer over a surface of the window layer. In another implementation, an optoelectronic device is described that includes a window layer disposed over an absorber layer; and a window passivation layer disposed over a surface of the window layer. In other implementations, a method and an optoelectronic device are based on providing a window layer of the optoelectronic device; and providing a window passivation layer of the optoelectronic device, wherein the window passivation layer is adjacent to the window layer.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: Andrew J. RITENOUR, Brendan M. KAYES
  • Patent number: 10811557
    Abstract: A growth structure having a lattice transition under a release layer is used as a seed crystal for growth of optoelectronic devices. The optoelectronic device can be a single- or multi-junction photovoltaic device. The release layer can be selectively removed in an epitaxial lift-off (ELO) process to separate the optoelectronic device from the growth structure and leave the region with the lattice transition intact to reuse the growth structure to grow additional devices. A manufacturing method is described that includes providing a growth structure having a substrate and a lattice transition from a first lattice constant to a second lattice constant, depositing a release layer on the growth structure, depositing on the release layer an epitaxial layer having a lattice constant that matches the second lattice and including an optoelectronic device, and removing the release layer to separate the epitaxial layer and the optoelectronic device from the growth structure.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 20, 2020
    Assignee: Alta Devices, Inc.
    Inventors: Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Brendan M. Kayes, Gang He
  • Publication number: 20200119216
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 16, 2020
    Inventors: Nikhil JAIN, Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Gang HE, Brendan M. KAYES
  • Publication number: 20200119222
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 16, 2020
    Inventors: Nikhil JAIN, Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Gang HE, Brendan M. KAYES
  • Publication number: 20190181281
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level.
    Type: Application
    Filed: February 15, 2019
    Publication date: June 13, 2019
    Inventors: Andrew J. RITENOUR, Brendan M. KAYES, Hui NIE, Isik KIZILYALLI
  • Publication number: 20180366609
    Abstract: A growth structure having a lattice transition under a release layer is used as a seed crystal for growth of optoelectronic devices. The optoelectronic device can be a single- or multi-junction photovoltaic device. The release layer can be selectively removed in an epitaxial lift-off (ELO) process to separate the optoelectronic device from the growth structure and leave the region with the lattice transition intact to reuse the growth structure to grow additional devices. A manufacturing method is described that includes providing a growth structure having a substrate and a lattice transition from a first lattice constant to a second lattice constant, depositing a release layer on the growth structure, depositing on the release layer an epitaxial layer having a lattice constant that matches the second lattice and including an optoelectronic device, and removing the release layer to separate the epitaxial layer and the optoelectronic device from the growth structure.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 20, 2018
    Inventors: Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Brendan M. KAYES, Gang He