Patents by Inventor Andrew J. Walton

Andrew J. Walton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5519693
    Abstract: A high performance data link interface includes receive and transmit data framing paths. The data link interface interlocks certain communication link control signals, such as the CCITT standard data set signals, with data being received or transmitted through the interface to correlate a transmission error directly to a particular data transmission for rapid and efficient error recovery.
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: May 21, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Robert J. Galuszka, Andrew J. Walton, Stewart F. Bryant
  • Patent number: 5301186
    Abstract: A high performance data link interface includes receive and transmit data framing paths. The data link interface interlocks certain communication link control signals, such as the CCITT standard data set signals, with data being received or transmitted through the interface to correlate a transmission error directly to a particular data transmission for rapid and efficient error recovery.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: April 5, 1994
    Assignee: Digital Equipment Corporation
    Inventors: Robert J. Galuszka, Andrew J. Walton, Stewart F. Bryant
  • Patent number: 5267199
    Abstract: In an apparatus including a first and second processor coupled to a shared bit-RAM memory, simultaneous write operations can be performed without internal race conditions in the memory. Rather than using arbitration, a write is generated by logic in each processor only when data to be written is different from data currently stored in a given location. A processor can write data to the bit-RAM only when a write pulse has been generated by that processor. Clocking signals from the processors are used to insure that a read and a write operation are not performed by two separate processors.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: November 30, 1993
    Assignee: Digital Equipment Corporation
    Inventors: Robert J. Galuszka, Andrew J. Walton, Clinton Choi