Patents by Inventor Andrew Jimenez

Andrew Jimenez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260090433
    Abstract: 3D printing material in direct contact with edge of a glass core in IC packages to additively form a frame. Multiple such cores may be reconstituted into a panel that may then be built-up with routing metallization and assembled with IC die. Layers of printed material may be built up to form a frame with approximately the same thickness as the glass core and of any desired lateral width. The printed material may be an organic polymer or inorganic composition including metallics and ceramics. Beads of different material composition may be printed in succession to vary mechanical, electrical and/or thermal properties. A portion of the protective frame may be retained on an edge of the glass core when panels are singulated into package substrate units. Frame material may also be printed upon edges of glass-cored package units after their singulation.
    Type: Application
    Filed: September 26, 2024
    Publication date: March 26, 2026
    Applicant: Intel Corporation
    Inventors: Zhixin Xie, Mohamed Saber, Bohan Shan, Anastasia Arrington, Clay Arrington, Jigneshkumar Patel, Catherine Mau, Ryan Carrazzone, Haobo Chen, Wei Li, Kyle Arrington, Ziyin Lin, Dingying Xu, Hongxia Feng, Hiroki Tanaka, Brandon Marin, Jeremy Ecton, Benjamin Duong, Gang Duan, Srinivas Pietambaram, Praveen Sreeramagiri, Andrew Jimenez, Yekan Wang, Jung Kyu Han
  • Publication number: 20260005159
    Abstract: Embodiments disclosed herein include an apparatus that comprises a first layer with a first surface, a second surface, and a sidewall surface that couples the first surface to the second surface. In an embodiment, the first layer comprises a glass layer. In an embodiment, a second layer is on the first surface, the second surface, and the sidewall surface of the first layer. In an embodiment, the second layer is an organic dielectric material. In an embodiment, a third layer is on the second layer, and the third layer is a metallic material. In an embodiment, an edge of the third layer is substantially coplanar with an edge of the second layer.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Inventors: Yekan WANG, Andrew JIMENEZ, Zhixin XIE, Manohar KONCHADY, Srinivas Venkata Ramanuja PIETAMBARAM, Nirupama CHAKRAPANI, Jung Kyu HAN, Gang DUAN
  • Publication number: 20260005042
    Abstract: There may be provided a system. The system may include a workpiece-support assembly that includes a platform positioned alongside a singulation axis of the system. The system may further include a material-removal assembly that includes a cutter, the cutter positioned over the platform and aligned with the singulation axis. The system may further include an irradiation assembly that includes a laser source oriented towards the singulation axis. The system may further include a separation assembly that includes a separation tool. The separation tool may include a first workpiece-engagement member positioned over a first portion of the platform at a first side of the singulation axis and a second workpiece-engagement member positioned over a second portion of the platform at an opposite side of the singulation axis, or an optical source oriented towards the singulation axis.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Inventors: Praveen SREERAMAGIRI, Ibrahim El KHATIB, Yi LI, Robin McREE, Jesse JONES, Gang DUAN, Manohar KONCHADY, Srinivas PIETAMBARAM, Yekan WANG, Andrew JIMENEZ, Aaron GARELICK
  • Publication number: 20260005078
    Abstract: An apparatus comprises a glass core comprising a top surface and a bottom surface opposite the top surface. A plurality of vias extending between the top and bottom surfaces. A metallization layer is over at least a portion of the top surface. An edge is between the top and bottom surfaces. The edge comprises one or more protrusions or one or more cavities. Each of the protrusions or cavities comprises a first surface parallel to the top surface, a second surface non-parallel to the top surface, and a polymer or a metal on the first or second surface.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 1, 2026
    Applicant: Intel Corporation
    Inventors: Soham Agarwal, Whitney Bryks, Aaditya Anand Candadai, Yi Cao, Kristof Darmawikarta, Gang Duan, Benjamin Duong, Jeremy Ecton, Mahdi Mohammadighaleni, Kari Hernandez, Andrew Jimenez, Houssam Jomaa, Manohar Konchady, Xinyu Li, Minglu Liu, Brandon Marin, Pratyush Mishra, Pratyasha Mohapatra, Seyyed Yahya Mousavi, Travis Palmer, Joseph Peoples, Srinivas Pietambaram, Bohan Shan, Joshua Stacey, Hiroki Tanaka, Yekan Wang, Hong Seung Yeon, Yingying Zhang
  • Publication number: 20260005160
    Abstract: Embodiments disclosed herein include an apparatus that includes a substrate that comprises a glass layer. In an embodiment, a frame is provided around the substrate, and a gap is provided between an edge of the substrate and an interior edge of the frame. In an embodiment, a fill layer is provided in the gap, and the fill layer comprises a dielectric material. In an embodiment, a ring is provided over the fill layer around a perimeter of the substrate. In an embodiment, the ring comprises a metallic material.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Inventors: Manohar KONCHADY, Andrew JIMENEZ, Son NGUYEN, Hiroki TANAKA, Yekan WANG, Srinivas Venkata Ramanuja PIETAMBARAM, Robert Alan MAY, Jacob VEHONSKY, Whitney BRYKS, Bohan SHAN, Gang DUAN, Bai NIE, Xiyu HU, Benjamin DUONG, Haobo CHEN, Brandon C. MARIN, Zhixin XIE, David VICKERY, Nirupama CHAKRAPANI, Dilan SENEVIRATNE, Jung Kyu HAN, Thomas HEATON
  • Publication number: 20250391717
    Abstract: Microelectronic assemblies with glass cores including stacks of glass layers are disclosed. In one aspect, a microelectronic assembly may include a glass core having a first layer of glass having a first CTE and a first opening extending between a top face and a bottom face of the first layer of glass, and a second layer of glass having a second CTE and a second opening extending between a top face and a bottom face of the second layer of glass, where the bottom face of the first layer of glass is stacked on the top face of the second layer of glass. The first opening may include a first conductive material, and the second opening may include a second conductive material. The microelectronic assembly may further include a frame around one or more outside edge walls of the first and second layers of glass.
    Type: Application
    Filed: June 24, 2024
    Publication date: December 25, 2025
    Applicant: Intel Corporation
    Inventors: Yekan Wang, Andrew Jimenez, Srinivas Venkata Ramanuja Pietambaram, Manohar Konchady
  • Publication number: 20250391715
    Abstract: Microelectronic assemblies with glass cores with outer frames and metal pillars are disclosed. In one aspect, a microelectronic assembly may include a glass core (e.g., a layer of glass or a glass structure) having a first face, a second face opposite the first face, one or more outside edge walls extending between the first face and the second face, and an opening extending between the first face and the second face. The microelectronic assembly may further include a conductive structure (e.g., a metal pillar) extending through the opening, and an outer frame around the one or more outside edge walls of the glass core, where a first gap may be present between the conductive structure and a sidewall of the opening, and a second gap may be present between the outer frame and at least one of the one or more outside edge walls.
    Type: Application
    Filed: June 20, 2024
    Publication date: December 25, 2025
    Applicant: Intel Corporation
    Inventors: Manohar Konchady, Yekan Wang, Andrew Jimenez, Srinivas Venkata Ramanuja Pietambaram
  • Publication number: 20250391720
    Abstract: Disclosed herein are microelectronic assemblies including strengthened glass layers, as well as related devices and methods. In some embodiments, a microelectronic assembly may include a glass layer including a cavity and having a first surface, an opposing second surface, and side surfaces extending between the first and second surfaces; a material in the cavity and on the first, second, and side surfaces of the glass layer; a first conductive via extending through the glass layer and through the material on the first and second surfaces of the glass layer; a second via extending through the material in the cavity, the second via including a conductive material surrounded by a magnetic material; and a dielectric layer on the material at the first surface of the glass layer, the dielectric layer including conductive pathways electrically coupled to the first conductive via and the second via.
    Type: Application
    Filed: June 21, 2024
    Publication date: December 25, 2025
    Applicant: Intel Corporation
    Inventors: Srinivas Venkata Ramanuja Pietambaram, Yekan Wang, Andrew Jimenez, Zhixin Xie, Manohar Konchady
  • Publication number: 20250218953
    Abstract: Example methods and apparatus for embedding interconnect bridges having through silicon vias in substrates are disclosed. An example semiconductor package a bridge die disposed in a recess of an underlying substrate, the bridge die including a via that electrically couples a first contact on a first side of the bridge die and a second contact on a second side of the bridge die, the recess extending to a first surface of the underlying substrate; a bond material to electrically and mechanically couple the first contact and an interconnect of the underlying substrate; and a fill material positioned between the first side of the bridge die and the first surface of the underlying substrate.
    Type: Application
    Filed: December 28, 2023
    Publication date: July 3, 2025
    Inventors: Zhixin Xie, Gang Duan, Rahul Manepalli, Srinivas Pietambaram, Andrew Jimenez, Andrey Gunawan, Jung Kyu Han, Minglu Liu, Shriya Seshadri, Yekan Wang, Hong Seung Yeon, Seyyed Yahya Mousavi
  • Publication number: 20250144857
    Abstract: Various aspects may provide a molding system. The molding system may include a molding unit which includes a first mold panel and a second mold panel. The first mold panel and the second mold panel may include a mold cavity which surrounds a semiconductor workpiece along a side surface of the semiconductor workpiece, with the first mold panel and the second mold panel engaged with the semiconductor workpiece. Various aspects may also provide a molding method which utilize the molding system.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventors: Zhixin XIE, Yi LI, Jesse JONES, Gang DUAN, Andrew JIMENEZ, Jung Kyu HAN, Yekan WANG
  • Publication number: 20250112136
    Abstract: Embodiments disclosed herein include apparatuses with glass core package substrates. In an embodiment, an apparatus comprises a substrate with a first surface and a second surface opposite from the first surface. A sidewall is between the first surface and the second surface, and the substrate comprises a glass layer. In an embodiment, a via is provided through the substrate between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with the sidewall of the substrate surrounds a perimeter of the substrate.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Bohan SHAN, Jesse JONES, Zhixin XIE, Bai NIE, Shaojiang CHEN, Joshua STACEY, Mitchell PAGE, Brandon C. MARIN, Jeremy D. ECTON, Nicholas S. HAEHN, Astitva TRIPATHI, Yuqin LI, Edvin CETEGEN, Jason M. GAMBA, Jacob VEHONSKY, Jianyong MO, Makoyi WATSON, Shripad GOKHALE, Mine KAYA, Kartik SRINIVASAN, Haobo CHEN, Ziyin LIN, Kyle ARRINGTON, Jose WAIMIN, Ryan CARRAZZONE, Hongxia FENG, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN, Dingying David XU, Hiroki TANAKA, Ashay DANI, Praveen SREERAMAGIRI, Yi LI, Ibrahim EL KHATIB, Aaron GARELICK, Robin MCREE, Hassan AJAMI, Yekan WANG, Andrew JIMENEZ, Jung Kyu HAN, Hanyu SONG, Yonggang Yong LI, Mahdi MOHAMMADIGHALENI, Whitney BRYKS, Shuqi LAI, Jieying KONG, Thomas HEATON, Dilan SENEVIRATNE, Yiqun BAI, Bin MU, Mohit GUPTA, Xiaoying GUO
  • Patent number: 8928454
    Abstract: This invention relates to a fastener system, in particular a system for improving computer room security, that reduces energy consumption. This invention provides a fastener system comprising at least one fastener for fastening a first element to a second element, the at least one fastener having a sensor to determine status of that fastener; a trigger box having an LED panel; a junction box capable of receiving and relaying authorization access; and an IP-connected control appliance with relay input/output for access control applications. This invention is particularly useful within server racks.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: January 6, 2015
    Inventors: Steven M. Brown, Andrew Jimenez, Timothy D. Holloway
  • Publication number: 20100259360
    Abstract: This invention relates to a fastener system, in particular a system for improving computer room security, that reduces energy consumption. This invention provides a fastener system comprising at least one fastener for fastening a first element to a second element, the at least one fastener having a sensor to determine status of that fastener; a trigger box having an LED panel; a junction box capable of receiving and relaying authorization access; and an IP-connected control appliance with relay input/output for access control applications. This invention is particularly useful within server racks.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 14, 2010
    Applicant: Telezygology, Inc.
    Inventors: Steven M. Brown, Andrew Jimenez, Timothy D. Holloway
  • Patent number: 7735875
    Abstract: A pipe coupling device that secures a first pipe to a second pipe. The pipe coupling device includes a collet disposed within a collar having a fastening mechanism. The collet includes a first collet portion that interlocks with a second collet portion to form a seal that fastens the first pipe securely to the second pipe.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: June 15, 2010
    Inventor: Andrew Jimenez
  • Publication number: 20070257488
    Abstract: A pipe coupling device that secures a first pipe to a second pipe. The pipe coupling device includes a collet disposed within a collar having a fastening mechanism. The collet includes a first collet portion that interlocks with a second collet portion to form a seal that fastens the first pipe securely to the second pipe.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 8, 2007
    Inventor: Andrew Jimenez
  • Publication number: 20070163796
    Abstract: The system integrates a CCTV system including one or more video source units into the structured cabling system (“SCS”) of a building or the like by combining video signals, control signals and power for each video source unit over a single multipair cable made up of plural unshielded twisted pairs (“UTP”) of insulated copper conductors, so that one twisted pair of the cable carries the video signals, one pair carries the control signals and one or two pairs carry the power. The system includes combiners and distributors which can interface with the SCS cable through standard modular, multi-pin plug and jack connectors.
    Type: Application
    Filed: February 28, 2007
    Publication date: July 19, 2007
    Inventors: Edward Polanek, James Hertrich, Peter Lockhart, Andrew Jimenez, Lawrence Roberts