Abstract: An analog-to-digital converter (ADC) system, such as a subranging ADC, including a cascade of buffer circuits and signal processing circuitry to measure and cancel the distortion introduced by the buffer circuits. Thus, buffer circuits can be added to the signal path of an input signal without the detrimental effects, such as added distortion, that typically accompany the addition of buffers.

Abstract: A measurement circuit comprises an input terminal to receive a current signal, a first circuit branch coupled to the first terminal and including one or more circuit elements to receive a portion of the current signal, a second circuit branch coupled to the first terminal and including one or more additional circuit elements to receive another portion of the current signal, a nonlinear circuit element coupling the first circuit branch to the second circuit branch, and a quantization circuit configured to produce an input current measurement of current in the first and second circuit branches, and to include current in the second circuit branch in the input current measurement according to a magnitude of the input current signal.

Abstract: Systems and techniques for Digital-to-Analog Converter (DAC) gain correction are described herein. A digital-to-analog converter (DAC) circuit can include a switch bridge circuit having a first leg and a second leg that define respective mutually exclusive first and second DAC signal paths. The DAC circuit can further include a first compensation circuit configured to provide a first compensation current to the first leg of the switch bridge to compensate for a current defect caused by a voltage drop across a portion of the first DAC signal path. The DAC circuit can also include a second compensation circuit configured to provide a. second compensation current to a second leg of the switch bridge to compensate for a voltage drop across a portion of the second DAC signal path. The DAC circuit can be included in a larger circuit such as a continuous time sigma delta (CTSD) analog-to-digital converter (ADC).

Abstract: Circuit techniques for providing base-current cancellation of a bipolar junction transistor (BJT) differential pair that compensate for tail current noise and differential voltage transients without penalizing supply headroom.

Abstract: A signal conditioning circuit to reduce detrimental effects of analog circuit elements. The techniques described herein provide a cascade of buffer circuits and signal processing circuitry to measure and cancel the distortion introduced by the buffer circuits. Thus, a buffer can be added to the signal path of an input signal without the detrimental effects, such as added distortion, that typically accompany the addition of buffers.

Abstract: A measurement circuit comprises an input terminal to receive a current signal, a first circuit branch coupled to the first terminal and including one or more circuit elements to receive a portion of the current signal, a second circuit branch coupled to the first terminal and including one or more additional circuit elements to receive another portion of the current signal, a nonlinear circuit element coupling the first circuit branch to the second circuit branch, and a quantization circuit configured to produce an input current measurement of current in the first and second circuit branches, and to include current in the second circuit branch in the input current measurement according to a magnitude of the input current signal.

Abstract: A circuit having a capacitance driver circuit can allow for reduction of thermal noise to an application circuit. An output of the capacitance driver circuit can drive a capacitor for use by the application circuit coupled to the capacitor at the output of the capacitance driver circuit. The capacitance driver circuit can be structured to operate over a bandwidth of interest. With an input signal, received at the capacitance driver circuit, associated with a target voltage, an output voltage can be provided at the output of the capacitance driver circuit as a bandlimited filtered voltage value of the target voltage, where a root-mean-square voltage deviation of the output voltage from the target voltage, due to thermal noise, is less than a square root of (kT/C). The term k is Boltzmann's constant, T is Kelvin temperature of the capacitance driver circuit, and C is the capacitance of the driven capacitor.

Abstract: A circuit having a capacitance driver circuit can allow for reduction of thermal noise to an application circuit. An output of the capacitance driver circuit can drive a capacitor for use by the application circuit coupled to the capacitor at the output of the capacitance driver circuit. The capacitance driver circuit can be structured to operate over a bandwidth of interest. With an input signal, received at the capacitance driver circuit, associated with a target voltage, an output voltage can be provided at the output of the capacitance driver circuit as a bandlimited filtered voltage value of the target voltage, where a root-mean-square voltage deviation of the output voltage from the target voltage, due to thermal noise, is less than a square root of (kT/C). The term k is Boltzmann's constant, T is Kelvin temperature of the capacitance driver circuit, and C is the capacitance of the driven capacitor.

Abstract: A measurement circuit comprises an electronic circuit, multiple measurement channels, and a combining circuit. The electronic circuit includes a first terminal, a second terminal, and a non-resistive circuit element. Each of the multiple measurement channels includes a differential input connected to the electronic circuit. The differential inputs of the multiple measurement channels are connected in series and include a differential input coupled to the non-resistive circuit element. One input of a differential input of a first measurement channel of the multiple measurement channels is connected to the first terminal of the electronic circuit and one input of a differential input of a second measurement channel of the multiple measurement channels is connected to the second terminal of the electronic circuit. The combining circuit receives multiple outputs from the multiple measurement channels and produce a composite output signal.

Abstract: A measurement circuit comprises an electronic circuit, multiple measurement channels, and a combining circuit. The electronic circuit includes a first terminal, a second terminal, and a non-resistive circuit element. Each of the multiple measurement channels includes a differential input connected to the electronic circuit. The differential inputs of the multiple measurement channels are connected in series and include a differential input coupled to the non-resistive circuit element. One input of a differential input of a first measurement channel of the multiple measurement channels is connected to the first terminal of the electronic circuit and one input of a differential input of a second measurement channel of the multiple measurement channels is connected to the second terminal of the electronic circuit. The combining circuit receives multiple outputs from the multiple measurement channels and produce a composite output signal.

Abstract: Techniques to provide automatic-gain ranging for high dynamic range by including a separate S/H capacitor, segmenting the S/H capacitor into a plurality of capacitors, and determining the number of segments to use for a sample. In this manner, the size of the S/H capacitor can be changed (by adjusting the number of capacitors), which can change the amount of input voltage that produces an amount of charge. Using these techniques, the full-scale input range for a sample of the analog input signal can be adjusted automatically based on the magnitude of the sample, which can provide better resolution and/or better noise performance for that particular sample then would otherwise be possible.

Abstract: Sample-and-hold (S/H) circuitry operating in track and hold phases and having a first S/H circuit with a first hold capacitor at which a first voltage value is maintained in the hold phase, and a dielectric absorption (DA)-suppressing circuit connectable to the first hold capacitor for operating the S/H circuitry in an additional phase after completing the hold phase and before entering the track phase. The DA-suppressing circuit is configured to supply the first hold capacitor, during an operation in the additional phase, with a second voltage value that is negatively correlated with the first voltage value.

Abstract: Sample-and-hold (S/H) circuitry operating in track and hold phases and having a first S/H circuit with a first hold capacitor at which a first voltage value is maintained in the hold phase, and a dielectric absorption (DA)-suppressing circuit connectable to the first hold capacitor for operating the S/H circuitry in an additional phase after completing the hold phase and before entering the track phase. The DA-suppressing circuit is configured to supply the first hold capacitor, during an operation in the additional phase, with a second voltage value that is negatively correlated with the first voltage value.

Abstract: A circuit includes a digital-to-analog converter configured to produce an analog output signal (1) proportional to a reference signal and (2) as a function of a digital input signal. The converter comprises a plurality of non-trivially complex admittances configured so that each non-trivially complex admittance can be selectively switched as a function of the digital input signal so as to be coupled between a reference terminal configured to receive a reference signal and an output terminal. The method comprises selectively switching non-trivially complex admittances as a function of the digital signal between a reference terminal and an output terminal.

Abstract: A circuit includes a digital-to-analog converter configured to produce an analog output signal (1) proportional to a reference signal and (2) as a function of a digital input signal. The converter comprises a plurality of non-trivially complex admittances configured so that each non-trivially complex admittance can be selectively switched as a function of the digital input signal so as to be coupled between a reference terminal configured to receive a reference signal and an output terminal. The method comprises selectively switching non-trivially complex admittances as a function of the digital signal between a reference terminal and an output terminal.