Patents by Inventor Andrew K. Wiggin

Andrew K. Wiggin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for mounting an integrated circuit having reduced thermal stresses between a bond pad and a metallic contact
    Patent number: 6436735
    Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system while reducing contact degradation due to stress that results from differences in the coefficients of thermal expansion of the various components during thermal cycling
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: August 20, 2002
    Assignee: Alpine Microsystems, Inc.
    Inventors: Martin P. Goetz, Sammy K. Brown, George E. Avery, Andrew K. Wiggin, Tom L. Todd, Sam Beal
  • Integrated circuits packaging system and method
    Patent number: 6400575
    Abstract: A plurality of integrated circuits are efficiently interconnected to improve the electrical performance of the overall system. This is accomplished by providing high speed, high density, system level interconnect, including interchip routing lines, on the integrated circuit devices, thereby reducing the routing complexity of the substrate or board. The devices are mounted directly on the board. An integrated circuit device comprises an integrated circuit region including integrated circuit elements. An interconnect layer includes an insulative material, a plurality of conductive traces, and a plurality of conductive bond pads arranged in first and second subsets. A first subgroup of the conductive traces are connected to the integrated circuit elements in the integrated circuit region and are connected to the first subset of conductive bond pads.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: June 4, 2002
    Assignee: Alpine Microsystems, LLC
    Inventors: Sammy K. Brown, George E. Avery, Andrew K. Wiggin, Samuel W. Beal
  • Wafer-level burn-in
    Patent number: 6337576
    Abstract: A method and a system for wafer level burn-in testing of a circuit featuring a flip-jumper to permit selectively connecting signals to the interconnect sites on the wafer that are in constant electrical communication with the circuit.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: January 8, 2002
    Assignee: Alpine Microsystems, Inc.
    Inventors: Andrew K. Wiggin, Allan Calamoneri, Martin P. Goetz, John Zasio, George E. Avery, Sammy K. Brown
  • System and method for packaging integrated circuits
    Patent number: 6175161
    Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system while reducing contact degradation due to stress that results from differences in the coefficients of thermal expansion of the various components during thermal cycling.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: January 16, 2001
    Assignee: Alpine Microsystems, Inc.
    Inventors: Martin P. Goetz, Sammy K. Brown, George E. Avery, Andrew K. Wiggin, Tom L. Todd, Sam Beal
  • Three dimensional mounting assembly for integrated circuits
    Patent number: 6128201
    Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system. In one embodiment of the system of the present invention, a plurality of carriers corresponds to a plurality of ICs, and a board has a plurality of board regions for receiving the plurality of ICs and are arranged so as to be attached to a backplane forming a vertical stack of boards.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: October 3, 2000
    Assignee: Alpine Microsystems, Inc.
    Inventors: Sammy K. Brown, George E. Avery, Andrew K. Wiggin, Tom L. Todd, Sam Beal
  • System and method for routing connections of integrated circuits
    Patent number: 6075711
    Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system. In one embodiment of the system of the present invention, a plurality of carriers corresponds to a plurality of ICs, and a board has a plurality of board regions for receiving the plurality of ICs. In one embodiment of the method of the present invention, a carrier is provided for each IC in a complex IC. A board having openings is provided, and the ICs are fitted into the board openings with the carriers mounted thereto.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: June 13, 2000
    Assignee: Alpine Microsystems, Inc.
    Inventors: Sammy K. Brown, George E. Avery, Andrew K. Wiggin