Abstract: In one example, a system comprises a vector-by-matrix multiplication array comprising an array of non-volatile memory cells arranged in rows and columns; and a sigma-delta analog-to-digital converter to receive a current from a column of the vector-by-matrix multiplication array and to generate a digital output in response to the current.

Abstract: In one example, a system comprises a vector-by-matrix multiplication array comprising non-volatile memory cells arranged into rows and columns, a first set of columns storing W+ weights and a second set of columns storing W? weights; and an output circuit to receive a first current from a respective column in the first set of columns and a second current from a respective column in the second set of columns and to generate a first voltage and a second voltage, the output circuit comprising a first current-to-voltage converter comprising a first integration capacitor to provide the first voltage equal to an initial voltage minus a first discharge value due to the first current, and a second current-to-voltage converter comprising a second integration capacitor to provide the second voltage equal to the initial voltage minus a second discharge value due to the second current.

Abstract: Provided are a converter circuit and a method of driving the same. The converter circuit includes: an input unit receiving a conversion target signal; a detection unit receiving a conversion target signal for each interval from the input unit, sampling the conversion target signal for each interval according to a plurality of timings to calculate an average value for each interval, and outputting a comparison unit input signal by using the average value for each interval; and a comparison unit comparing the comparison unit input signal with a predetermined reference signal to output a comparison result value.

Abstract: A relaxation oscillator and a method for offset cancellation in a relaxation oscillator. The relaxation oscillator comprises two comparator units, each comparator unit comprising a comparator element and a memory element; and a switch control generator coupled to each of the comparator units; wherein each comparator unit, in a reset state, stores an input-offset voltage on the memory element under the control of the switch control generator such that, in a comparison state, the input-offset voltage is applied to both inputs of the comparator for implementing an offset-free threshold.

Abstract: Provided are a converter circuit and a method of driving the same. The converter circuit includes: an input unit receiving a conversion target signal; a detection unit receiving a conversion target signal for each interval from the input unit, sampling the conversion target signal for each interval according to a plurality of timings to calculate an average value for each interval, and outputting a comparison unit input signal by using the average value for each interval; and a comparison unit comparing the comparison unit input signal with a predetermined reference signal to output a comparison result value.

Abstract: Disclosed are a pixel, a pixel array, and an image sensor including the pixel array. The pixel includes a first photo-sensing unit to detect a visible light and an IR, and a second photo-sensing unit provided at one side of the first photo-sensing unit to detect a light in which the IR is blocked.

Abstract: Disclosed are a pixel, a pixel array, and an image sensor including the pixel array. The pixel includes a first photo-sensing unit to detect a visible light and an IR, and a second photo-sensing unit provided at one side of the first photo-sensing unit to detect a light in which the IR is blocked.

Abstract: A relaxation oscillator and a method for offset cancellation in a relaxation oscillator. The relaxation oscillator comprises two comparator units, each comparator unit comprising a comparator element and a memory element; and a switch control generator coupled to each of the comparator units; wherein each comparator unit, in a reset state, stores an input-offset voltage on the memory element under the control of the switch control generator such that, in a comparison state, the input-offset voltage is applied to both inputs of the comparator for implementing an offset-free threshold.

Abstract: A method for converting a sensor capacitance under parasitic capacitance conditions and a capacitance-to-voltage (CV) converter circuit for converting a sensor capacitance under parasitic capacitance conditions are provided. The method comprises the step of using a two stage operational amplifier (op-amp) in non-unity-gain configuration, wherein the two stage op-amp is chosen to be unstable in unity-gain configuration for reducing power consumption.