Patents by Inventor Andrew L. Van Brocklin

Andrew L. Van Brocklin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7084894
    Abstract: An optical focusing system is configured to generate a data profile, wherein the data profile is configured to provide signals for operation of an actuator. Application of the signals from the data profile results in focus of optics within a label region of an optical disc. An image is printed on the label region of the optical disc while the optics focus on the label region of the optical disc by applying signals to the actuator according to the data profile.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: August 1, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Daryl E. Anderson
  • Patent number: 7072108
    Abstract: A projection screen is provided that includes a display surface having a plurality of elements. Each element has an optical property that is responsive to an appropriate applied voltage. The display surface may be configured so that the optical properties of each element may be coordinated with the projected image.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: July 4, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Antonio S. Cruz-Uribe, William J. Allen, John Christopher Rudin, Andrew Arthur Hunter, Andrew L. Van Brocklin
  • Patent number: 7057258
    Abstract: A resistive cross point array memory device comprising a plurality of word lines extending in a row direction, a plurality of bit lines extending in a column direction such that a plurality of cross points is formed at intersections between the word and bit lines, and at least one memory element formed in at least one of the cross points. The memory element comprises a first tunnel junction having a bottom conductor, a top conductor, a barrier layer adjacent the bottom conductor, and wherein the bottom conductor comprises a non-uniform upper surface.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: June 6, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lung T. Tran, Andrew L. Van Brocklin, Warren B. Jackson, Janice Nickel
  • Patent number: 7019381
    Abstract: A semiconductor substrate is provided over which electrically conductive columns are formed along with electrically conductive rows crossing over the electrically conductive columns. A plurality of memory components are formed each having a resistance value corresponding to multiple logical bits and non-volatile memory cells are each formed by connecting a memory component between an electrically conductive row and an electrically conductive column.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: March 28, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kenneth K. Smith, Sarah M. Brandenberger, Judy Bloomquist, legal representative, Kenneth J. Eldredge, Andrew L. Van Brocklin, Peter J. Fricke, Darrel R. Bloomquist, deceased
  • Patent number: 6970285
    Abstract: The present invention relates to a microcapsule that can be used to form a rewritable medium for visual displays that are stable in the presence of electric fields having a strength that is typical in the work environment. The microcapsule of the invention comprises charged particles of one or more colors that are suspended in a phase change material that has a melting temperature in the range of between about 30° C. and about 200° C. The microcapsules can be used to form an electrophoretic coating that includes microcapsules of the invention distributed throughout a polymer matrix. The electrophoretic coating can be used to coat a substrate to form a rewritable medium.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: November 29, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, William Dorogy
  • Patent number: 6967350
    Abstract: A memory structure that includes a first electrode, a second electrode, a third electrode, a control element of a predetermined device type disposed between the first electrode and the second electrode, and a memory storage element of the predetermined device type disposed between the second electrode and the third electrode. The memory storage element has a cross-sectional area that is less than a cross-sectional area of the control element.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: November 22, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter J. Frick, Andrew Koll, James Stasiak, Andrew L. Van Brocklin, Lung T. Tran
  • Patent number: 6967149
    Abstract: Apparatus and method for making a multi-layered storage structure includes forming a device layer on a single-crystal wafer, cleaving the device layer from the wafer, repeating the forming and cleaving to provide a plurality of cleaved device layers, and bonding the cleaved device layers together to form the multi-layered storage structure.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: November 22, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Neal W. Meyer, Andrew L. Van Brocklin, Peter Fricke, Warren Jackson, Kenneth James Eldredge
  • Patent number: 6958946
    Abstract: A memory storage device includes a memory cell configurable to have at least a first conductive state and includes a first and second conductor each electrically coupled to the memory cell. A regulation circuit is configured to regulate a sense voltage on the second conductor to be independent of a current conducted through the first conductor when the memory cell is configured to have the first conductive state.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 25, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Peter Fricke, John M. da Cunha
  • Patent number: 6940085
    Abstract: A memory structure that includes a first electrode, a second electrode, a third electrode, a control element disposed between the first electrode and the second electrode, and a memory storage element disposed between the second electrode and the third electrode. At least one of the control element and memory storage element is protected from contamination by at least one of the first electrode, second electrode and third electrode.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: September 6, 2005
    Assignee: Hewlett-Packard Development Company, I.P.
    Inventors: Peter Fricke, Andrew Koll, Dennis M. Lazaroff, Andrew L. Van Brocklin
  • Patent number: 6917532
    Abstract: A memory storage device includes a first and second memory cell which each have a top end and a bottom end. A first and second first dimension conductor are substantially coplanar and parallel and extend in a first dimension. The first first dimension conductor intersects the bottom end of the first memory cell and the second first dimension conductor intersects the top end of the second memory cell. A first second dimension conductor extends in a second dimension and intersects the top end of the first memory cell and a second second dimension conductor extends in the second dimension and intersects the bottom end of the second memory cell. A first third dimension conductor which extends in a third dimension is positioned between the first and second memory cell to couple the first second dimension conductor to the second second dimension conductor.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: July 12, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Peter Fricke
  • Patent number: 6897506
    Abstract: Described in this disclosure is a non-volatile memory cell. The non-volatile memory cell generally includes a short-range atomic order substrate, a dielectric positioned adjacent to the substrate, and a non-floating gate positioned adjacent to the dielectric.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: May 24, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Warren B. Jackson
  • Patent number: 6893951
    Abstract: Interconnection structures for integrated circuits have first cells disposed in a first plane, at least second cells disposed in at least a second plane parallel to the first plane, and vertical interconnections disposed for connecting conductors in the first plane with conductors in the second plane, at least some of the vertical interconnections initially incorporating antifuses. The antifuses may be disposed over conductors that are disposed on a base substrate. The antifuses are selectively fused to prepare the integrated circuit for normal operation. Methods for fabricating and using such vertical interconnection structures are disclosed.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: May 17, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter Fricke, Andrew L. Van Brocklin
  • Patent number: 6879525
    Abstract: An integrated circuit includes an array of state-change devices, first and second decoder circuits for selecting a particular state-change device. A voltage source is coupled to the first decoder circuit and sense circuitry is coupled to the second decoder to receive an electrical parameter from the selected state-change device and to detect a particular value of the electrical parameter. A control circuit is coupled to the voltage source, the first and second decoders, and the sense circuitry to select a first voltage from the voltage source to alter the selected state-change device and to select a second voltage from the voltage source when the sense circuitry detects the particular value of the electrical parameter.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: April 12, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Peter Fricke, S. Jonathan Wang
  • Patent number: 6872437
    Abstract: An optical disc of an embodiment of the invention is disclosed that includes an optically writable label side on which marks are optically writable. The optical disc includes a plurality of tracks on the optically writable label side. Each track has written thereto a repeating pseudorandom series of marks.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: March 29, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Andrew Koll
  • Patent number: 6870751
    Abstract: Disclosed are improved cross-point array memory devices. In one embodiment, a memory device comprises a cross-point array of memory cells, each memory cell including a storage element and a current concentrating feature that concentrates current applied to the storage element. In another embodiment, a memory device comprises a cross-point array of memory cells, each memory cell including a storage element having a preprogrammed filament fuse configured to be disabled during a write procedure.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: March 22, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L. Van Brocklin, Peter Fricke
  • Patent number: 6858883
    Abstract: A memory system, including a first electrode, a memory storage element, and a control element. The control element having a breakdown voltage. The breakdown voltage is increased by partially-processing the control element. In one aspect, the partial-processing results by processing the control element for a briefer duration than the memory storage element. In another aspect, the partial-processing results by forming the control element from a plurality of layers, some of the plurality of layers are unprocessed while other ones of the plurality of layers are fully processed.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: February 22, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter J. Fricke, Janice H. Nickel, Andrew L. Van Brocklin
  • Patent number: 6853486
    Abstract: A projection screen is provided that includes a display surface having a plurality of elements. Each element has an optical property that is responsive to an appropriate applied voltage. The display surface may be configured so that the optical properties of each element may be coordinated with the projected image.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: February 8, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Antonio S. Cruz-Uribe, William J. Allen, John Christopher Rudin, Andrew Arthur Hunter, Andrew L. Van Brocklin
  • Patent number: 6847350
    Abstract: An electronic device has a case and a screen attached to the case. The screen indicates a cursor position. The electronic device further has an input device mounted to the case. The input device includes a curved surface for detecting an object disposed on the curved surface using a light path that transfers an image of the object to an optical sensor. The optical sensor detects the movement of the object across the curved surface and in response, the input device manipulates the cursor position.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: January 25, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L Van Brocklin, Glen A Oross, James F Bausch, Gregory J May
  • Patent number: 6842369
    Abstract: An intermesh memory device includes memory components that each have a determinable resistance value and electronic switches that each control current through one or more of the memory components such that a potential is applied to the memory components. A first electronic switch of the intermesh memory device is electrically coupled to an input of a memory component and a second electronic switch is electrically coupled to an output of the memory component. The first electronic switch and the second electronic switch are configured together to apply a potential to the memory component.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: January 11, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew Koll, Peter Fricke, Andrew L. Van Brocklin
  • Patent number: 6839275
    Abstract: Embodiments of the present invention provide a memory system. In one embodiment, the memory system comprises an array of memory cells, a write circuit configured to write memory cells in the array of memory cells and a control circuit. The control circuit is configured to receive data, provide encoded received data to match a fault pattern in the array of memory cells, and control the write circuit to write the encoded received data into the array of memory cells at a fault address of the fault pattern.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: January 4, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew L Van Brocklin, Kenneth Smith, Kenneth James Eldredge, Peter James Fricke