Patents by Inventor Andrew M. Spencer
Andrew M. Spencer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9645775Abstract: A printer includes an access module to control access among different participants, one participant at a time, to at least some encrypted parts of a composite document print job located at the printer.Type: GrantFiled: July 11, 2013Date of Patent: May 9, 2017Assignee: Hewlett-Packard Development Company, L.P.Inventors: Helen Balinsky, Andrew M. Spencer, Nassir Mohammad
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Patent number: 9552337Abstract: A composite document comprises a publicly posted composite document including a plurality of parts, a map-file for each participant in a workflow associated with the composite document, and a set of encryption keys. The encryption keys are associated with at least one of the plurality of parts and distributed via the map file to the participants. At least one of the parts of the composite document, associated with the encryption keys, includes workflow processing instructions. The workflow processing instructions are enactable by the multifunction printer independent of a server and automate at east some steps of the workflow for participant at the multifunction printer via resident functions of the multifunction printer.Type: GrantFiled: April 30, 2013Date of Patent: January 24, 2017Assignee: Hewlett-Packard Development Company, L.P.Inventors: Helen Balinsky, Andrew M. Spencer, Nassir Mohammad
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Publication number: 20160110320Abstract: A composite document comprises a publicly posted composite document including a plurality of parts, a map-file for each participant in a workflow associated with the composite document, and a set of encryption keys. The encryption keys are associated with at least one of the plurality of parts and distributed via the map file to the participants. At least one of the parts of the composite document, associated with the encryption keys, includes workflow processing instructions. The workflow processing instructions are enactable by the multifunction printer independent of a server and automate at east some steps of the workflow for participant at the multifunction printer via resident functions of the multifunction printer.Type: ApplicationFiled: April 30, 2013Publication date: April 21, 2016Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: HELEN BALINSKY, ANDREW M. SPENCER, NASSIR MOHAMMAD
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Publication number: 20160077776Abstract: A printer includes an access module to control access among different participants, one participant at a time, to at least some encrypted parts of a composite document print job located at the printer.Type: ApplicationFiled: July 11, 2013Publication date: March 17, 2016Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: HELEN BALINSKY, ANDREW M. SPENCER, NASSIR MOHAMMAD
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Patent number: 9152437Abstract: Methods, computer-readable media, and systems are provided for dynamically installing an image processing filter. One method for dynamically installing an image processing filter includes starting to obtain image information by infrastructure of an image processing device and processing the obtained image information with an application. After starting to obtain image information, receiving an operating system (OS) application programming interface (API) allowing just-in-time (JIT) bytecode to be executed as a filter during processing the obtained image information.Type: GrantFiled: October 28, 2010Date of Patent: October 6, 2015Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Andrew M. Spencer, Randall Edward Grohs
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Publication number: 20120110601Abstract: Methods, computer-readable media, and systems are provided for dynamically installing and image processing filter. One method for dynamically installing and image processing filter includes starting to obtain image information by infrastructure of an image processing device and processing the obtained image information with an application. After starting to obtain image information, receiving an operating system (OS) application programming interface (API) allowing just-in-time (JIT) bytecode to be executed as a filter during processing the obtained image information.Type: ApplicationFiled: October 28, 2010Publication date: May 3, 2012Inventors: Andrew M. Spencer, Randall Edward Grohs
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Patent number: 7461204Abstract: A method, data structure, and system for storing memory card usage information on a memory card is provided. The method includes a step of collecting information about usage. The method also includes the steps of recording the information about usage in an area of the memory card, and accessing the information about usage.Type: GrantFiled: November 30, 2001Date of Patent: December 2, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Todd C. Adelmann, Margo N. Whale
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Patent number: 7213086Abstract: A system comprises a storage controller for managing transfers of data between a host and storage memory; a data mover coupled to the storage controller handling data transferred between a host and storage memory; and a buffer coupled to the data mover for storing data being transferred. The storage controller modifies operation of the storage system based on status of the data transfer. An associate method comprises transferring data between a host and storage memory via a storage system, and dynamically adjusting operation of the storage system depending on status of the data transfer.Type: GrantFiled: October 28, 2003Date of Patent: May 1, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stewart R. Wyatt, Andrew M. Spencer, Robert G. Mejia, Connie K. Lemus, Kenneth J. Eldredge, Cyrille de Brebisson
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Patent number: 7152138Abstract: A system-on-a-chip is described herein. The system-on-a-chip includes a microprocessor, a non-volatile imperfect semiconductor memory device and a memory controller. The memory controller is configured to transfer device data between the microprocessor and the non-volatile semiconductor imperfect memory device.Type: GrantFiled: January 30, 2004Date of Patent: December 19, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Tracy Ann Sauerwein
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Patent number: 7149950Abstract: A device comprises a memory array in which a plurality of codewords is stored. Each codeword comprises an error correction code and a data block that comprises a plurality of units of data. The device further comprises an error code correction module coupled to the memory array. When multiple units of data are to be read from the device for an address, a codeword stored in a location associated with the address is fetched from the memory array, the error code correction module decodes the codeword and corrects any errors in the data block for that codeword, and the multiple units of data are read from the corrected data block.Type: GrantFiled: September 12, 2003Date of Patent: December 12, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Todd C. Adelmann, Stewart R. Wyatt, Kenneth Kay Smith
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Patent number: 7111142Abstract: Data storage systems and methods for writing data into a memory component and reading data from the memory component are disclosed. By utilizing a high-speed data controller, the systems and methods transfer data at a fast data transfer rate. In one implementation, the memory component comprises a memory controller for managing data within the memory component. The memory controller comprises the high-speed data controller and a data manager. The data manager comprises a compression/decompression engine that compresses and decompresses data and a storage device interface.Type: GrantFiled: September 13, 2002Date of Patent: September 19, 2006Assignee: Seagate Technology LLCInventors: Andrew M. Spencer, Tracy Ann Sauerwein
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Patent number: 7007120Abstract: Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.Type: GrantFiled: April 25, 2003Date of Patent: February 28, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Robert G. Mejia
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Patent number: 6940153Abstract: A memory card includes at least one magnetic random access memory supported by a substrate, and a memory card cover disposed over the magnetic random access memory and the substrate to form a memory card, wherein at least one of the substrate and the memory card cover includes magnetic shielding to at least partially shield the magnetic random access memory from external magnetic fields, the memory card cover forming an external portion of the memory card.Type: GrantFiled: February 5, 2003Date of Patent: September 6, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Connie Lemus, Colin Stobbs
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Patent number: 6906964Abstract: Disclosed herein are systems and apparatuses having memories with a multiple buffer memory interface. In one embodiment, an integrated memory device comprises: a memory array integrated on a substrate, and a multiple buffer memory interface integrated on the same substrate. The memory interface comprises multiple read buffers each associated with a different region of the memory array and configured to buffer only data for read operations on the associated region.Type: GrantFiled: June 27, 2003Date of Patent: June 14, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Kenneth J. Eldredge
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Patent number: 6862604Abstract: A removable data storage device is provided that is used with electronic devices using compact data storage capabilities. The removable data storage device includes memory for storing data files and a file management information that includes memory allocation information of the memory. A scan logic is provided that analyzes the file management information and generates file usage data of the memory. With th present invention, a removable data storage device can self-analyze its memory contents and determine, for example, types of files and memory space consumed by each file type in the memory.Type: GrantFiled: January 16, 2002Date of Patent: March 1, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew M. Spencer, Todd C. Adelmann, Margo N. Whale
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Publication number: 20040268046Abstract: Memory devices and methods that provide a nonvolatile buffered memory interface are disclosed. In one embodiment, a memory device may comprise: a nonvolatile memory array, and a nonvolatile buffered memory interface integrated on a substrate with the memory array. The memory interface may comprise one or more volatile buffers configured to buffer data for read operations, and a table memory configured to indicate one or more addresses associated with data buffered in the one or more volatile buffers.Type: ApplicationFiled: June 27, 2003Publication date: December 30, 2004Inventor: Andrew M. Spencer
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Publication number: 20040267993Abstract: Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.Type: ApplicationFiled: April 25, 2003Publication date: December 30, 2004Inventors: Andrew M. Spencer, Robert G. Mejia
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Patent number: 6823417Abstract: A memory card controller controls the file allocation table and file system structures of a memory card, in order to speed up data transfer to and from the memory card and a host device, such as a digital camera. The memory card controller includes a memory to store the file allocation table, and a processor to update the file allocation table and file system structures based on access commands received from the host device.Type: GrantFiled: October 1, 2001Date of Patent: November 23, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Andrew M. Spencer
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Publication number: 20040152261Abstract: A memory card includes at least one magnetic random access memory supported by a substrate, and a memory card cover disposed over the magnetic random access memory and the substrate to form a memory card, wherein at least one of the substrate and the memory card cover includes magnetic shielding to at least partially shield the magnetic random access memory from external magnetic fields, the memory card cover forming an external portion of the memory card.Type: ApplicationFiled: February 5, 2003Publication date: August 5, 2004Inventors: Andrew M. Spencer, Connie Lemus, Colin Stobbs
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Publication number: 20040098545Abstract: Data storage systems and methods for writing data into a memory component and reading data from the memory component are disclosed. The systems and methods transfer data in one of a number of selectable transfer modes. In one implementation, the memory component comprises a memory controller for managing data within the memory component. The memory controller comprises a switching circuit that has a plurality of data input/output (I/O) terminals and multiple sets of transfer terminals. A standard transfer circuit is connected to one set of transfer terminals and a fast serial transfer circuit is connected to another set of transfer terminals. The memory controller further comprises a compression/decompression engine that compresses data.Type: ApplicationFiled: November 15, 2002Publication date: May 20, 2004Inventors: Steven L. Pline, Andrew M. Spencer, Kenneth J. Eldredge, Michael Altree