Patents by Inventor Andrew Mark Player

Andrew Mark Player has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7072361
    Abstract: A system and method are provided for transporting backward information in a digital wrapper format network of connected simplex devices. The system comprises a first simplex processor receiving downstream messages with overhead bytes. The first simplex processor selectively replaces overhead bytes with calculated overhead bytes and supplies the calculated overhead bytes. The system further comprises a buffer receiving the calculated overhead bytes from the first simplex processor and supplying the calculated overhead bytes. A second simplex processor accepts the calculated overhead bytes from the buffer and supplies an upstream message including the calculated overhead bytes. The first simplex processor receives messages in a frame format with an overhead section, drops the overhead section, and selectively reads backward message monitor bytes in the dropped overhead section to determine if upstream communication nodes are receiving transmitted messages.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: July 4, 2006
    Assignee: Applied Micro Circuits Corporation
    Inventor: Andrew Mark Player
  • Patent number: 7058090
    Abstract: A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 6, 2006
    Assignee: Applied Micro Circuits Corporation
    Inventors: Andrew Mark Player, Alan Michael Sorgi, George Beshara Bendak
  • Patent number: 7039725
    Abstract: A system and method are provided for securely buffering overhead messages in a network-connected integrated circuit. The method comprises: receiving messages including overhead bytes; collecting overhead bytes; creating a first overhead message from the collected overhead bytes; establishing a overhead message semaphore; and, saving the first overhead message until it is read, in response to the semaphore. Saving the first overhead message until it is read means not overwriting the first overhead message stored in the buffer until the buffer is read. Not overwriting the first overhead message stored in the buffer until the buffer is read includes the substeps of: setting the semaphore to the lock state; and, in response the semaphore lock state, not writing collected overhead bytes for a second overhead message to the buffer.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 2, 2006
    Assignee: Applied Micro Circuits Corp.
    Inventor: Andrew Mark Player
  • Patent number: 6993700
    Abstract: A system and method are provided for generating alarms from forward error correction (FEC) data in a G.709 network-connected integrated circuit. The method includes: receiving messages including forward error correction bytes; using the forward error correction bytes to detect errors in the messages; and, generating alarm signals in response to the detected errors. Generating alarm signals in response to the detected errors includes generating a signal degrade (SD) signal in response to detecting a first number of errors (error density) within a predetermined time period. Likewise, generating alarm signals in response to the detected errors includes generating a signal fail (SF) signal in response to detecting a second number of errors (second error density), greater than the first number, within the predetermined time period. The method further includes: selecting an error type. Then, alarm signals are generated in response to the selected error type.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: January 31, 2006
    Assignee: Applied Micro Circuits Corporation
    Inventors: Andrew Mark Player, George Beshara Bendak
  • Patent number: 6912667
    Abstract: A system and method are provided for transporting FTFL messages in a G.709 network-connected simplex device. The method comprises: receiving messages from a first source in a digital wrapper frame format with overhead bytes in every frame; recovering FTFL information from the received message overhead bytes; and, selectively supplying modified FTFL information for transmit message overhead bytes to the first source. Recovering FTFL information from the received message overhead bytes includes recovering a 256 byte FTFL message, including a 128-byte forward message and a 128-byte backward message.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: June 28, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventors: Andrew Mark Player, Eric Minghorng Su
  • Patent number: 6910127
    Abstract: A system and method have been provided for securely provisioning configuration data in a network-connected integrated circuit device. The method comprises: receiving configuration data addressed to device registers; loading the configuration data in configuration registers; and, locking to prevent the loading of subsequently received configuration data. Locking to prevent the loading of subsequently received configuration data includes the substeps of: establishing at least one locking register having a first address; loading a first lock set in the locking register; and, in response to loading the first lock set in the locking register, preventing the loading of received data in the configuration registers.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 21, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventor: Andrew Mark Player