Abstract: An embodiment of an electronic apparatus may include a substrate and a controller coupled to the substrate, the controller including circuitry to control access to a NAND-based storage media that includes a plurality of NAND devices located on the substrate and organized into two or more physical clusters with each NAND device uniquely assigned to one of the two or more physical clusters, perform data access to a first physical cluster of the two or more physical clusters at a first bandwidth, and perform data access to a second physical cluster of the two or more physical clusters at a second bandwidth that is slower than the first bandwidth. Other embodiments are disclosed and claimed.

Abstract: A nonvolatile storage device includes a power management system with a power loss imminent (PLI) capacitor to provide backup energy in case system power is lost. The power management system includes a circuit with a charging path for the PLI capacitor that includes a series current-limiting circuit, and a diode coupled in parallel with the current-limiting circuit, the diode having a cathode coupled to the charging circuit and an anode to couple to the PLI capacitor.

Abstract: Systems, apparatuses and methods may provide for technology that applies a constant current to a capacitor, wherein the constant current causes a linear voltage increase in the capacitor, and determines a capacitance based on the constant current, a voltage change in the capacitor during the linear voltage increase, and a time change corresponding to the voltage change.

Abstract: Systems, apparatuses and methods may provide for technology that includes a solid state drive (SSD) having an enclosure, a non-volatile memory (NVM) device, a device controller coupled the NVM device, a capacitor, a backup voltage line coupled to the capacitor, and a safety assembly. The safety assembly may include a timer circuit including an input node coupled to the backup voltage line, a reset node, and an output node, an indicator circuit coupled to the output node of the timer circuit, and a temperature comparator circuit coupled to the reset node of the timer circuit, wherein if a temperature of the enclosure exceeds a threshold while a backup voltage is present on the backup voltage line, the temperature comparator circuit causes the timer circuit to trigger light pulses from the indicator circuit.

Abstract: An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.

Abstract: In embodiments, an apparatus includes a burst current monitor, to detect a burst of input current drawn by a SSD from a host above a pre-defined burst threshold, and control logic coupled to the burst current monitor. The control logic, in response to the detection by the burst current monitor of the input current above the burst threshold, causes a capacitor of the SSD to supply an assistance current to the SSD, to reduce the input current drawn by the SSD. In embodiments, the capacitor is a hold-up capacitor disposed in a PLI circuit of the SSD, and the apparatus is integrated within a hold-up control logic sub-circuit of the PLI circuit.

Abstract: An embodiment of an electronic apparatus comprises a main board, a wing board electrically coupled to the main board by a flexible connector along an edge of the main board, wherein the wing board is arranged at an angle that is non-parallel with respect to the main board. Other embodiments are disclosed and claimed.

Abstract: An apparatus is described. The apparatus includes a power management integrated circuit (PMIC) semiconductor chip having logic circuitry to implement a PMIC/PMIC interface having a downstream signal line and an upstream signal line. The downstream signal line to communicate any of multiple states that a downstream PMIC semiconductor chip is to implement with one of multiple voltage levels, where, different ones of the multiple voltage levels correspond to different ones of the multiple states. The upstream signal line is to communicate whether or not the downstream PMIC semiconductor chip is ready to receive a next one of the multiple voltage levels.

Abstract: An embodiment of an electronic system comprises a main board, and a modular capacitor subassembly mechanically and electrically coupled to the main board, wherein the modular capacitor subassembly provides backup power for the main board, and wherein the main board is adapted for use in at least two housing form factors. Other embodiments are disclosed and claimed.

Abstract: Apparatuses, systems, and methods having positionally aware communication between a controller and a plurality of solid state drives (SSD) over a multi-wire serial bus is described. An example electronic device includes a multi-wire serial bus, multiple SSD connectors coupled to the multi-wire serial bus, and a serial bus position address (BPos) line to uniquely identify the physical position of each SSD connector with a unique BPos identifier (ID). The device also includes a serial bus controller coupled to the multi-wire serial bus and further comprising circuitry configured to communicate with a specific SSD connector at a known physical position by associating the BPos ID of the specific SSD connector with the communication.

Abstract: Techniques for proximity based on-die termination (ODT) include a memory device determining what ODT setting to apply during execution of a command by another memory device that is coupled to a same data channel as the memory device based on the memory device's proximity to the other memory device and whether the command is a read command or a write command.

Abstract: A method is described. The method includes performing write operations on a plurality of NVRAM semiconductor chips of a memory module while tracking power budget headroom for performing the write operations and while monitoring current draw on a supply voltage rail that is coupled to the plurality of NVRAM semiconductor chips. The method further includes detecting the current draw has reached a threshold. The method further includes ceasing or diminishing the write operations in response to the detecting.

Abstract: Embodiments include devices and method related to a foldable printed circuit board that may be used in SSD applications. One embodiment relates to a foldable printed circuit board comprising a first rigid portion, a second rigid portion, and a first flexible region coupling the first rigid portion to the second rigid portion. The foldable printed circuit board also includes a third rigid portion and a second flexible region coupling the second rigid portion to the third rigid portion, wherein the first rigid portion and the third rigid portion each have a width that is less than that of the second rigid portion. Other embodiments are described and claimed.

Abstract: An apparatus is described. The apparatus includes a power management integrated circuit (PMIC) semiconductor chip having logic circuitry to implement a PMIC/PMIC interface having a downstream signal line and an upstream signal line. The downstream signal line to communicate any of multiple states that a downstream PMIC semiconductor chip is to implement with one of multiple voltage levels, where, different ones of the multiple voltage levels correspond to different ones of the multiple states. The upstream signal line is to communicate whether or not the downstream PMIC semiconductor chip is ready to receive a next one of the multiple voltage levels.

Abstract: An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.

Abstract: In embodiments, an apparatus includes a burst current monitor, to detect a burst of input current drawn by a SSD from a host above a pre-defined burst threshold, and control logic coupled to the burst current monitor. The control logic, in response to the detection by the burst current monitor of the input current above the burst threshold, causes a capacitor of the SSD to supply an assistance current to the SSD, to reduce the input current drawn by the SSD. In embodiments, the capacitor is a hold-up capacitor disposed in a PLI circuit of the SSD, and the apparatus is integrated within a hold-up control logic sub-circuit of the PLI circuit.

Abstract: Embodiments include devices and method related to a foldable printed circuit board that may be used in SSD applications. One embodiment relates to a foldable printed circuit board comprising a first rigid portion, a second rigid portion, and a first flexible region coupling the first rigid portion to the second rigid portion. The foldable printed circuit board also includes a third rigid portion and a second flexible region coupling the second rigid portion to the third rigid portion, wherein the first rigid portion and the third rigid portion each have a width that is less than that of the second rigid portion. Other embodiments are described and claimed.

Abstract: A nonvolatile storage device includes a power management system with a power loss imminent (PLI) capacitor to provide backup energy in case system power is lost. The power management system includes a circuit with a charging path for the PLI capacitor that includes a series current-limiting circuit, and a diode coupled in parallel with the current-limiting circuit, the diode having a cathode coupled to the charging circuit and an anode to couple to the PLI capacitor.

Abstract: Apparatuses, systems, and methods having positionally aware communication between a controller and a plurality of solid state drives (SSD) over a multi-wire serial bus is described. An example electronic device includes a multi-wire serial bus, multiple SSD connectors coupled to the multi-wire serial bus, and a serial bus position address (BPos) line to uniquely identify the physical position of each SSD connector with a unique BPos identifier (ID). The device also includes a serial bus controller coupled to the multi-wire serial bus and further comprising circuitry configured to communicate with a specific SSD connector at a known physical position by associating the BPos ID of the specific SSD connector with the communication.

Abstract: Provided is a memory device, comprising a non-volatile memory, an energy store coupled to the non-volatile memory, and a power management module configurable to power up the non-volatile memory and provide read access to the non-volatile memory, in response to the energy store being charged to at least a first predetermined level. Provided also is a computational device that includes the memory device. Provided also is a method in which an energy store coupled to a non-volatile memory of a memory device is charged to at least a first predetermined level. The non-volatile memory is powered up and read access is provided to the non-volatile memory, in response to charging the energy store to at least the first predetermined level.