Abstract: A method and structure are disclosed which involve the re-wafering of previously processed and tested IC chips. The chips are encapsulated in supporting non-conductive material in a neo-wafer, so that they may be further processed preparatory to dicing layer units from the neo-wafer, which layer units are ready for stacking in a three-dimensional electronic package. Although the layer areas are the same, different stacked layers may contain different sized IC chips, and a single layer may encapsulate a plurality of chips. Precision of location of the separate IC chips in the neo-wafer is insured by use of photo-patterning means to locate openings in the neo-wafer into which extend conductive bumps on the chips. The neo-wafer is preferably formed with separate cavities in which the chips are located before they are covered with the encapsulating material.

Abstract: Neo-chips suitable for stacking in 3D multi-layer electronic modules are formed by embedding (encapsulating ) IC chips in epoxy material which provides sufficient layer rigidity after curing. The encapsulated chips are formed by placing separate IC chips, usually "known good" die, in a neo-wafer, which is subjected to certain process steps, and then diced to form neo-chips. The following benefits are obtained: (1) The starting IC chips (die) intended for stacking may have different sizes, and serve different electronic purposes. After they are encapsulated in same-size neo-chips, they can be efficiently stacked using well-developed processing steps; (2) The individual chips for stacking can be purchased as "known good" die.

Abstract: Neo-chips suitable for stacking in 3D multi-layer electronic modules are formed by embedding (encapsulating) IC chips in epoxy material which provides sufficient layer rigidity after curing. The encapsulated chips are formed by placing separate IC chips, usually "known good" die, in a neo-wafer, which is subjected to certain process steps, and then diced to form neo-chips. The following benefits are obtained: (1) The starting IC chips (die) intended for stacking may have different sizes, and serve different electronic purposes. After they are encapsulated in same-size neo-chips, they can be efficiently stacked using well-developed processing steps; (2) The individual chips for stacking can be purchased as "known good" die.