Patents by Inventor Andrew N. Karanicolas

Andrew N. Karanicolas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6654214
    Abstract: Electrostatic discharge protection is provided to an integrated circuit in which, for a particular embodiment, the integrated circuit comprises a switched capacitor circuit having a plurality of groups of voltage reference input ports; and a plurality of electrostatic discharge resistors coupled to a pad, wherein each electrostatic discharge resistor is coupled to a unique group of voltage reference input ports.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: November 25, 2003
    Assignee: Intel Corporation
    Inventor: Andrew N. Karanicolas
  • Publication number: 20020080056
    Abstract: An embodiment of the present invention provides a reference buffer circuit comprising a first reference voltage circuit to provide a first reference voltage at a first port to sink a first current at the first port; a second reference voltage circuit to provide a second reference voltage at a second port to sink a second current at the second port; and a current source circuit to source a source current at an output port, where the output port is connected to the second port. According to another embodiment of the present invention, the first and second ports are connected to a resistor ladder network of a flash analog-to-digital converter.
    Type: Application
    Filed: December 21, 2000
    Publication date: June 27, 2002
    Inventor: Andrew N. Karanicolas
  • Publication number: 20020079991
    Abstract: According to an embodiment of the present invention, a capacitor comprising field effect transistors and a bias transistor.
    Type: Application
    Filed: December 21, 2000
    Publication date: June 27, 2002
    Inventor: Andrew N. Karanicolas
  • Patent number: 6094093
    Abstract: The input buffer circuit achieves open-loop linearization at low voltage by generating diode voltages independently from resistor voltages using two separate amplifiers--a main amplifier to generate the resistor voltages and an auxiliary amplifier to generate the diode voltages. Another component in the input buffer, such as a transconductance amplifier, provides the functionality of adding the diode and resistor voltages together to generate the output signal of the input buffer. The input buffer may be used in a track-and-hold amplifier (TH amp) having open-loop linearization yet requiring low power supply voltage and low power consumption. In one embodiment of the TH amp, two input buffers each receive a differential input and both generate two output signals, where the output signals from one input buffer are out of phase with the output signals from the other input buffer.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: July 25, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Andrew N. Karanicolas
  • Patent number: 6031398
    Abstract: The switch circuit has a replica switch connected to a main switch to reduce feedthrough otherwise resulting from parasitic capacitance of the main switch. In operation, the replica switch is always open so as not to interfere with the signals generated by the main switch. A track-and-hold amplifier (TH amp) having both open-loop linearization and feedthrough reduction yet requiring low power supply voltage and low power consumption. In one embodiment of the TH amp, two input buffers each receive a differential input and both generate two output signals, where the output signals from one input buffer are out of phase with the output signals from the other input buffer. Two switch circuits each receive one signal from each input buffer and each switch circuit generates an output signal that is accumulated in one of two hold capacitors, when the switch circuit is closed (i.e., track mode). When the switch circuits are open (i.e.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: February 29, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Andrew N. Karanicolas
  • Patent number: 5721500
    Abstract: An RF IC having an improved transconductance comprises a first active device of a first conductance type having a gate, a drain and a source and a second active device of a second conductance type having a gate, a drain and a source. The second active device is coupled in series with the first active device. The gate of the first active device is coupled to the gate of the second active device. A current reuse circuit is coupled to the first active device and the second active device wherein a current flowing from the drain of the first active device is reused in the second active device. Whereby transconductance is increased without an increased current utilization and without an increase in noise.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: February 24, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: Andrew N. Karanicolas
  • Patent number: 5499027
    Abstract: A self-calibrating pipeline analog-to-digital converter having a plurality of analog-to-digital conversion units and including a recursive calibrating section operable for calibrating errors associated with an immediately preceding first conversion unit.
    Type: Grant
    Filed: February 24, 1994
    Date of Patent: March 12, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Andrew N. Karanicolas, Hae-Seung Lee