Patents by Inventor Andrew P. Stack

Andrew P. Stack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140020845
    Abstract: An apparatus comprising a first substrate, a second substrate, a bonding layer positioned between the first substrate and the second substrate, the bonding layer holding the first substrate and the second substrate together, and a reactive layer embedded in the bonding layer. The reactive layer can generate sufficient thermal energy to cause the first substrate to separate from the second substrate without damaging at least one of the first substrate or the second substrate when the reactive layer is activated, and is preferably comprised of a reactive multilayer foil.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 23, 2014
    Applicant: Thermal Conductive Bonding, Inc.
    Inventors: Ryan A. Scatena, Andrew P. Stack, Joseph A. Simpson
  • Patent number: 5598317
    Abstract: A semiconductor capacitor used to test for contaminants in a fabrication line is created by: forming a layer of insulating material on a semiconductor substrate, forming a layer of conductive thin film on the layer of insulating material, and laser patterning an area of the conductive thin film. Laser patterning is performed by applying the laser along the outer boundary of the area to be patterned to energetically remove the conductive thin film along this boundary.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: January 28, 1997
    Assignee: Integrated Device Technology, Inc.
    Inventors: Ciaran Hanrahan, Andrew P. Stack
  • Patent number: 5585016
    Abstract: A semiconductor capacitor used to test for contaminants in a fabrication line is created by: forming a layer of insulating material on a semiconductor substrate, forming a layer of conductive thin film on the layer of insulating material, and laser patterning an area of the conductive thin film. Laser patterning is performed by applying the laser along the outer boundary of the area to be patterned to energetically remove the conductive thin film along this boundary.
    Type: Grant
    Filed: July 20, 1993
    Date of Patent: December 17, 1996
    Assignee: Integrated Device Technology, Inc.
    Inventors: Ciaran Hanrahan, Andrew P. Stack
  • Patent number: 5146098
    Abstract: The present invention is directed to systems and methods for accurately detecting the presence of particles, such as contaminants and residual gases in an end station during wafer processing. In a preferred embodiment, the type and amount of each contaminant can be determined by spectrally decomposing in situ light generated during wafer processing to detect characteristics of potential contaminants and/or residual gases. Characteristics which can be used to identify the presence of contaminants include abnormal wavelength, frequency and/or intensity of energy present during wafer processing.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: September 8, 1992
    Assignee: VLSI Technology, Inc.
    Inventor: Andrew P. Stack