Patents by Inventor Andrew Paul Collins

Andrew Paul Collins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT PACKAGE WITH FLIPPED HIGH BANDWIDTH MEMORY DEVICE
    Publication number: 20230081139
    Abstract: An example microelectronic assembly includes a substrate, a bridge die over the substrate, and a die stack between the substrate and the bridge die, the die stack including a logic die and at least one memory die, where the logic die is between the at least one memory die and the bridge die.
    Type: Application
    Filed: September 15, 2021
    Publication date: March 16, 2023
    Applicant: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Chandra Mohan Jha, Andrew Paul Collins, Omkar G. Karhade
  • Embedded very high density (VHD) layer
    Patent number: 11387187
    Abstract: Embodiments may relate to an interposer that has a first layer with a plurality of first layer pads that may couple with a die. The interposer may further include a second layer with a power delivery component. The interposer may further include a very high density (VHD) layer, that has a VHD pad coupled by a first via with the power delivery component and coupled by a second via with a first layer pad. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Andrew Paul Collins, Jianyong Xie, Sujit Sharan, Henning Braunisch, Aleksandar Aleksov
  • DISAGGREGATED DIE WITH INPUT/OUTPUT (I/O) TILES
    Publication number: 20210263880
    Abstract: Embodiments may relate to a die with a processor. The die may include a first input/output (I/O) tile adjacent to a first side of the processor, and a second I/O tile adjacent to a second side of the processor. The first or second I/O tiles may be communicatively coupled with the processor. Other embodiments may be described or claimed.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 26, 2021
    Applicant: Intel Corporation
    Inventors: Andrew Paul Collins, Mahesh Krishnappayya Kumashikar, Srikanth Nimmagadda
  • EMBEDDED VERY HIGH DENSITY (VHD) LAYER
    Publication number: 20200006236
    Abstract: Embodiments may relate to an interposer that has a first layer with a plurality of first layer pads that may couple with a die. The interposer may further include a second layer with a power delivery component. The interposer may further include a very high density (VHD) layer, that has a VHD pad coupled by a first via with the power delivery component and coupled by a second via with a first layer pad. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Andrew Paul Collins, Jianyong Xie, Sujit Sharan, Henning Braunisch, Aleksandar Aleksov