Abstract: A method is provided for fabricating a backside-illuminated photodetector in which a device wafer is joined to a readout wafer in an IC hybridization step. Before the IC hybridization step, the device layer is defined in the device wafer, and an LPCVD layer is formed over the device layer. The LPCVD layer may be a passivation layer, an antireflection coating, or both. The side of the device wafer having the LPCVD layer is bonded to a handle wafer, the IC is hybridized by mating the device wafer to the readout wafer, and the handle wafer is then removed, exposing the LPCVD layer. Because the LPCVD layer is formed before the active devices are fabricated, it can be made by high-temperature techniques for deposition and processing. Accordingly, a layer of high quality can be fabricated without any hazard to the active devices.

Abstract: The various technologies presented herein relate to integrating an IC having at least one waveguide incorporated therein with a v-groove array IC such that an optical fiber located in a v-groove is aligned relative to a waveguide in the IC maximizing optical coupling between the fiber and the waveguide. The waveguide IC and the v-groove array IC are bonded in a stacked configuration. Alignment of the waveguide IC and the array IC in the stacked configuration enables advantage to be taken of lithographic accuracy of features formed with respect to the Z-direction. Further, kinematic pins and sockets are utilized to provision accuracy in the X- and Z-directions, wherein advantage is taken of the placement accuracy and fabrication tolerance(s) which can be utilized when forming the and sockets. Accordingly, automated alignment of the waveguide IC and the array IC is enabled, facilitating accurate alignment of the respective waveguides and fibers.

Abstract: A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode in a slot-like opening formed in a dielectric material. A method of making the opening using a silylated photoresist.

Abstract: A method of making a electrically operated programmable resistance memory element. A silylated photoresist sidewall spacer is used as a mask for form raised portions on an edge of a conductive layer. The modified conductive layer is used as an electrode for the memory element.

Abstract: A method of making a electrically operated programmable resistance memory element. A silylated photoresist sidewall spacer is used as a mask for form raised portions on an edge of a conductive layer. The modified conductive layer is used as an electrode for the memory element.

Abstract: A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode in a slot-like opening formed in a dielectric material. A method of making the opening using a silylated photoresist.