Patents by Inventor Andrew Pye

Andrew Pye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230005010
    Abstract: An example system includes: an e-commerce platform to support e-commerce activities of a plurality of merchants; a loyalty rewards system to: track, for each merchant operating on the e-commerce platform, customer accounts and associated loyalty rewards points for each respective customer account; a hub system in communication with the loyalty rewards system, the hub module to: track, for a hub account, a set of associated customer accounts, each associated customer account corresponding to one of the merchants; retrieve, from the loyalty rewards system, the associated loyalty rewards points for each respective customer account in the set of associated customer accounts; and aggregate the associated loyalty rewards points for the hub account; and output the aggregated associated loyalty rewards points to a client device associated with the hub account.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 5, 2023
    Inventors: Edgar Willemsma, Lawrence Galante, Katrina Cinelli, Panayotis Esquivel Procopiou, Darren Denomme, Andrew Pye, Michael Rossi, Robert Chi-Tai Liang, Matthew Hennessy, Dan Winer
  • Patent number: 10950542
    Abstract: One embodiment is an apparatus comprising a semiconductor integrated circuit (“IC”) chip comprising at least one active component for implementing an amplifier circuit; and a laminate structure comprising a plurality of metal layers, the laminate structure further comprising a plurality of passive components and transmission line-based structures. The semiconductor IC chip is integrated with the laminate structure such that a top layer of the laminate structure comprises a shield over a top of the semiconductor IC chip and the passive components for limiting electromagnetic coupling of signals generated by the amplifier circuit beyond the laminate structure.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: March 16, 2021
    Assignee: ANALOG DEVICES, INC.
    Inventors: Luke Steigerwald, Marc E. Goldfarb, Andrew Pye, Simon Gay
  • Publication number: 20200303302
    Abstract: One embodiment is an apparatus comprising a semiconductor integrated circuit (“IC”) chip comprising at least one active component for implementing an amplifier circuit; and a laminate structure comprising a plurality of metal layers, the laminate structure further comprising a plurality of passive components and transmission line-based structures. The semiconductor IC chip is integrated with the laminate structure such that a top layer of the laminate structure comprises a shield over a top of the semiconductor IC chip and the passive components for limiting magnetic coupling of signals generated by the amplifier circuit beyond the laminate structure.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Applicant: Analog Devices, Inc.
    Inventors: Luke Steigerwald, Marc E. Goldfarb, Andrew Pye, Simon Gay
  • Patent number: 10122341
    Abstract: Coupled-line baluns with common-mode compensation are provided herein. In certain configurations, a series resistor-inductor (RL) network is connected to ports of a coupled-line balun to null the common-mode transmission coefficient at a desired frequency. This extends performance at lower frequencies by improving the low frequency amplitude and phase balance of the device. The inductor and resistor can be connected in series between one of the differential terminals and a single-ended grounded terminal. This advantageously can null the common-mode transmission at a specific frequency near a minimum length-dominated frequency so as to enhance the common-mode rejection at lower frequencies.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 6, 2018
    Assignee: Analog Devices, Inc.
    Inventor: Andrew Pye
  • Publication number: 20180123551
    Abstract: Coupled-line baluns with common-mode compensation are provided herein. In certain configurations, a series resistor-inductor (RL) network is connected to ports of a coupled-line balun to null the common-mode transmission coefficient at a desired frequency. This extends performance at lower frequencies by improving the low frequency amplitude and phase balance of the device. The inductor and resistor can be connected in series between one of the differential terminals and a single-ended grounded terminal. This advantageously can null the common-mode transmission at a specific frequency near a minimum length-dominated frequency so as to enhance the common-mode rejection at lower frequencies.
    Type: Application
    Filed: December 1, 2016
    Publication date: May 3, 2018
    Inventor: Andrew Pye
  • Patent number: 9437558
    Abstract: An integrated circuit can include a group of bond pads alternating between bond pads configured to provide a return path and bond pads configured to provide a signal bond pad. For example, five bond pads can be arranged in a return-signal-return-signal-return arrangement. The integrated circuit can further be configured to receive or transmit high frequency signals.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: September 6, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventors: Andrew Pye, Rodrigo Carrillo-Ramirez
  • Publication number: 20160190075
    Abstract: An integrated circuit can include a group of bond pads alternating between bond pads configured to provide a return path and bond pads configured to provide a signal bond pad. For example, five bond pads can be arranged in a return-signal-return-signal-return arrangement. The integrated circuit can further be configured to receive or transmit high frequency signals.
    Type: Application
    Filed: February 3, 2015
    Publication date: June 30, 2016
    Inventors: Andrew Pye, Rodrigo Carrillo-Ramirez
  • Patent number: 9172353
    Abstract: In one example embodiment, a programmable filter is provided, including a plurality of variable-inductance networks and a plurality of variable-capacitance networks. The programmable filter may be implemented in a classical filter topology, with variable-capacitance networks replacing discrete capacitors and variable-inductance networks replacing discrete inductors. An example variable-inductance network comprises a primary inductor with an intermediate tap, and secondary inductor connected at the intermediate tap, with switches for selecting an inductance.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 27, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Andrew Pye, Marc E. Goldfarb
  • Publication number: 20150097637
    Abstract: In one example embodiment, a programmable filter is provided, including a plurality of variable-inductance networks and a plurality of variable-capacitance networks. The programmable filter may be implemented in a classical filter topology, with variable-capacitance networks replacing discrete capacitors and variable-inductance networks replacing discrete inductors. An example variable-inductance network comprises a primary inductor with an intermediate tap, and secondary inductor connected at the intermediate tap, with switches for selecting an inductance.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 9, 2015
    Applicant: ANALOG DEVICES, INC.
    Inventors: Andrew Pye, Marc E. Goldfarb