Abstract: A data storage card insertable into a peripheral slot of host system is provided that houses storage devices on both sides of the data storage card. A heat sink member establishes a skewed offset stackup among a primary circuit board and a secondary circuit board, and a circuit interconnect element couples across the skewed offset stackup between the circuit boards. The primary circuit board comprises an edge connector insertable into a peripheral slot connector and is configured to carry host signaling for the computer peripheral device. The secondary circuit board comprises a first set of data storage device connectors on a first side and a second set of data storage connectors on a second side. The skewed offset stackup allows for a thickness of storage devices inserted on both the first side and the second side to fit within a slot width of the peripheral slot.

Abstract: Systems, methods, apparatuses, and software for data systems are provided herein. In one example, a meshed computing architecture is presented that includes a midplane comprising PCIe interconnect, storage modules configured to couple to a first portion of the PCIe interconnect, controller modules configured to couple to a second portion of the PCIe interconnect, and fabric modules configured to couple to a third portion of the PCIe interconnect. The first portion of the PCIe interconnect communicatively couples each of the storage modules to each of the controller modules and each of the fabric modules, the second portion of the PCIe interconnect communicatively couples each of the controller modules to each of the fabric modules, and third portion of the PCIe interconnect communicatively couples the controller modules to each other.

Abstract: Systems, methods, apparatuses, and software for data systems are provided herein. In one example, a meshed computing architecture is presented that includes a midplane comprising PCIe interconnect, storage modules configured to couple to a first portion of the PCIe interconnect, controller modules configured to couple to a second portion of the PCIe interconnect, and fabric modules configured to couple to a third portion of the PCIe interconnect. The first portion of the PCIe interconnect communicatively couples each of the storage modules to each of the controller modules and each of the fabric modules, the second portion of the PCIe interconnect communicatively couples each of the controller modules to each of the fabric modules, and third portion of the PCIe interconnect communicatively couples the controller modules to each other.