Abstract: A system including a first module and a second module. The first module includes a linear feedback shift register (LFSR) and a permutator circuit. The LFSR outputs a pseudo-random sequence of digital values based on a stored key value. The permutator circuit operates on successive groups of input bits using the pseudo-random sequence. For each of said successive groups, the permutator circuit: (a) selects a bit permutation based on a respective one of the digital values in the pseudo-random sequence, (b) permutes the bits of the group using the selected bit permutation to obtain a resultant group of bits, and (c) transmits the resultant group onto an output bus. The second module also includes an LFSR and a permutator circuit that operate to invert the permutations applied by the first module. In a two-dimensional embodiment, the first module and second module may include additional circuitry for scrambling bits between groups.

Abstract: A system including a first module and a second module. The first module includes a linear feedback shift register (LFSR) and a permutator circuit. The LFSR outputs a pseudo-random sequence of digital values based on a stored key value. The permutator circuit operates on successive groups of input bits using the pseudo-random sequence. For each of said successive groups, the permutator circuit: (a) selects a bit permutation based on a respective one of the digital values in the pseudo-random sequence, (b) permutes the bits of the group using the selected bit permutation to obtain a resultant group of bits, and (c) transmits the resultant group onto an output bus. The second module also includes an LFSR and a permutator circuit that operate to invert the permutations applied by the first module. In a two-dimensional embodiment, the first module and second module may include additional circuitry for scrambling bits between groups.