Patents by Inventor Andrew Read

Andrew Read has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8806247
    Abstract: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: August 12, 2014
    Inventors: Sameer Halepete, H. Peter Anvin, Zongjian Chen, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman, Thomas Lawrence, Andrew Read
  • Publication number: 20140035646
    Abstract: A phase shift generation circuit has an edge detector for generating first and second edge signals indicating first and second edges of an input pulse signal. The circuit comprises a divide by N circuit that divides the frequency of a first clock signal by N. The circuit comprises a pulse counter, which receives the first edge signal and the second clock signal, and outputs a group of signals representing the number of the second clock pulses between occurrences of the first edge signal. The circuit has a first recycling timer that outputs a group of pulses as a uniformly spaced group across the period of the input pulse. The circuit also has a second recycling timer that outputs a group of pulses as a uniformly spaced group across the period of the input pulse. The first and second recycling timers are used to generate a phase shifted output pulse.
    Type: Application
    Filed: October 8, 2013
    Publication date: February 6, 2014
    Applicant: Supertex, Inc.
    Inventors: James T. WALKER, Andrew Read
  • Patent number: 8566627
    Abstract: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: October 22, 2013
    Inventors: Sameer Halepete, H. Peter Anvin, Zongjian Chen, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman, Thomas Lawrence, Andrew Read
  • Patent number: 8558598
    Abstract: A phase shift generation circuit has an edge detector, which outputs a first and a second edge signal. The circuit also has a divide by N circuit, which receives a first clock signal and a group of signals representing a number N, and outputs a second clock signal. The circuit further comprises a pulse counter, which receives the first edge signal and the second clock signal, and outputs a group of signals representing the number of the second clock pulses between occurrences of the first edge signal. The circuit has first and second recycling timers, which output a group of pulses approximating a uniformly spaced group across the time duration of the period of the input pulse. The circuit also comprises at least one flip flop which generates a phase shifted output pulse.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: October 15, 2013
    Assignee: Supertex, Inc.
    Inventors: James T. Walker, Andrew Read
  • Publication number: 20130132749
    Abstract: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.
    Type: Application
    Filed: December 21, 2012
    Publication date: May 23, 2013
    Inventors: Sameer Halepete, H. Peter Anvin, Zongjian Chen, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman, Thomas Lawrence, Andrew Read
  • Patent number: 8442784
    Abstract: A method and system of adaptive power control based on pre package characterization of integrated circuits. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: May 14, 2013
    Inventors: Andrew Read, Malcolm Wing, Louis C. Kordus, Thomas E. Stewart
  • Patent number: 8407348
    Abstract: A method of determining whether a user has complied with a service level agreement (SLA) with a network operator, comprising collecting a set of data values representative of the user's service usage and comparing the set of data values to the service level agreement. The data values collected provide the operator with sufficient information so that it can determine whether a SLA is being complied with and to plan provision of network services. A method of monitoring a user's usage of a network service and a service usage indicator is also disclosed.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: March 26, 2013
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Steve Taylor Chapman, Mark Andrew Read
  • Publication number: 20110289211
    Abstract: A method of determining whether a user has complied with a service level agreement (SLA) with a network operator, comprising collecting a set of data values representative of the user's service usage and comparing the set of data values to the service level agreement. The data values collected provide the operator with sufficient information so that it can determine whether a SLA is being complied with and to plan provision of network services. A method of monitoring a user's usage of a network service and a service usage indicator is also disclosed.
    Type: Application
    Filed: August 1, 2011
    Publication date: November 24, 2011
    Inventors: Steve Taylor Chapman, Mark Andrew Read
  • Publication number: 20110219245
    Abstract: A method and system of adaptive power control. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 8, 2011
    Inventors: James B. Burr, Andrew Read, Tom Stewart
  • Patent number: 8015291
    Abstract: A method of determining whether a user has complied with a service level agreement (SLA) with a network operator, comprising collecting a set of data values representative of the user's service usage and comparing the set of data values to the service level agreement. The data values collected provide the operator with sufficient information so that it can determine whether a SLA is being complied with and to plan provision of network services. A method of monitoring a user's usage of a network service and a service usage indicator is also disclosed.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: September 6, 2011
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Steve Taylor Chapman, Mark Andrew Read
  • Patent number: 7941675
    Abstract: A method and system of adaptive power control. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: May 10, 2011
    Inventors: James B. Burr, Andrew Read, Tom Stewart
  • Publication number: 20110107131
    Abstract: A method for reducing power utilized by a processor including the steps of determining that a processor is transitioning from a computing mode to a mode is which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.
    Type: Application
    Filed: January 10, 2011
    Publication date: May 5, 2011
    Inventors: Andrew Read, Sameer Halepete, Keith Klayman
  • Patent number: 7870404
    Abstract: A method for reducing power utilized by a processor including determining that a processor is transitioning from a computer mode to a mode in which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: January 11, 2011
    Inventors: Andrew Read, Sameer Halepete, Keith Klayman
  • Publication number: 20100231279
    Abstract: A phase shift generation circuit has an edge detector, which receives an input pulse signal and outputs a first and a second edge signal denoting the time of occurrence of the first and second edges of the input pulse signal. The circuit also has a divide by N circuit, which receives a first clock signal and a group of signals representing a number N, and outputs a second clock signal, said a second clock signal having a frequency equal to the frequency of said first clock signal divided by the number N. The circuit further comprises a pulse counter, which receives the first edge signal and the second clock signal, and outputs a group of signals representing the number of the second clock pulses between occurrences of the first edge signal. The circuit has a first recycling timer, which receives the number of second clock pulses, the first edge signal and the first clock signal, and outputs a group of pulses approximating a uniformly spaced group across the time duration of the period of the input pulse.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 16, 2010
    Applicant: Supertex, Inc.
    Inventors: James T. Walker, Andrew Read
  • Publication number: 20100011233
    Abstract: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 14, 2010
    Inventors: Sameer Halepete, H. Peter Anvin, Zongjian Chen, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman, Thomas Lawrence, Andrew Read
  • Patent number: 7596708
    Abstract: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: September 29, 2009
    Inventors: Sameer Halepete, H. Peter Anvin, Zongjian Chen, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman, Thomas Lawrence, Andrew Read
  • Publication number: 20090222556
    Abstract: A method of determining whether a user has complied with a service level agreement (SLA) with a network operator, comprising collecting a set of data values representative of the user's service usage and comparing the set of data values to the service level agreement. The data values collected provide the operator with sufficient information so that it can determine whether a SLA is being complied with and to plan provision of network services. A method of monitoring a user's usage of a network service and a service usage indicator is also disclosed.
    Type: Application
    Filed: February 16, 2007
    Publication date: September 3, 2009
    Inventors: Steve Taylor Chapman, Mark Andrew Read
  • Publication number: 20070294555
    Abstract: A method for reducing power utilized by a processor including determining that a processor is transitioning from a computer mode to a mode in which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.
    Type: Application
    Filed: August 21, 2007
    Publication date: December 20, 2007
    Inventors: Andrew Read, Sameer Halepete, Keith Klayman
  • Patent number: 7260731
    Abstract: A method for reducing power utilized by a processor including the steps of determining that a processor is transitioning from a computing mode to a mode is which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: August 21, 2007
    Assignee: Transmeta Corporation
    Inventors: Andrew Read, Sameer Halepete, Keith Klayman
  • Patent number: 7228242
    Abstract: A method and system of adaptive power control based on pre package characterization of integrated circuits. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: June 5, 2007
    Assignee: Transmeta Corporation
    Inventors: Andrew Read, Malcolm Wing, Louis C. Kordus, Thomas E. Stewart